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H A D | hwprobe.h | a29e2a48afe3549ee34d39cf42343ba3fced09c6 Mon Sep 18 15:15:25 CEST 2023 Andrew Jones <ajones@ventanamicro.com> RISC-V: selftests: Add CBO tests
Add hwprobe test for Zicboz and its block size. Also, when Zicboz is present, test that cbo.zero may be issued and works. Additionally provide a command line option that enables testing that the Zicbom instructions cause SIGILL and also that cbo.zero causes SIGILL when Zicboz it's not present. The SIGILL tests require "opt-in" with a command line option because the RISC-V ISA does not require unimplemented standard opcodes to issue illegal-instruction exceptions (but hopefully most platforms do).
Pinning the test to a subset of cpus with taskset will also restrict the hwprobe calls to that set.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiao Wang <xiao.w.wang@intel.com> Link: https://lore.kernel.org/r/20230918131518.56803-14-ajones@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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H A D | cbo.c | a29e2a48afe3549ee34d39cf42343ba3fced09c6 Mon Sep 18 15:15:25 CEST 2023 Andrew Jones <ajones@ventanamicro.com> RISC-V: selftests: Add CBO tests
Add hwprobe test for Zicboz and its block size. Also, when Zicboz is present, test that cbo.zero may be issued and works. Additionally provide a command line option that enables testing that the Zicbom instructions cause SIGILL and also that cbo.zero causes SIGILL when Zicboz it's not present. The SIGILL tests require "opt-in" with a command line option because the RISC-V ISA does not require unimplemented standard opcodes to issue illegal-instruction exceptions (but hopefully most platforms do).
Pinning the test to a subset of cpus with taskset will also restrict the hwprobe calls to that set.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiao Wang <xiao.w.wang@intel.com> Link: https://lore.kernel.org/r/20230918131518.56803-14-ajones@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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H A D | Makefile | diff a29e2a48afe3549ee34d39cf42343ba3fced09c6 Mon Sep 18 15:15:25 CEST 2023 Andrew Jones <ajones@ventanamicro.com> RISC-V: selftests: Add CBO tests
Add hwprobe test for Zicboz and its block size. Also, when Zicboz is present, test that cbo.zero may be issued and works. Additionally provide a command line option that enables testing that the Zicbom instructions cause SIGILL and also that cbo.zero causes SIGILL when Zicboz it's not present. The SIGILL tests require "opt-in" with a command line option because the RISC-V ISA does not require unimplemented standard opcodes to issue illegal-instruction exceptions (but hopefully most platforms do).
Pinning the test to a subset of cpus with taskset will also restrict the hwprobe calls to that set.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiao Wang <xiao.w.wang@intel.com> Link: https://lore.kernel.org/r/20230918131518.56803-14-ajones@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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H A D | hwprobe.c | diff a29e2a48afe3549ee34d39cf42343ba3fced09c6 Mon Sep 18 15:15:25 CEST 2023 Andrew Jones <ajones@ventanamicro.com> RISC-V: selftests: Add CBO tests
Add hwprobe test for Zicboz and its block size. Also, when Zicboz is present, test that cbo.zero may be issued and works. Additionally provide a command line option that enables testing that the Zicbom instructions cause SIGILL and also that cbo.zero causes SIGILL when Zicboz it's not present. The SIGILL tests require "opt-in" with a command line option because the RISC-V ISA does not require unimplemented standard opcodes to issue illegal-instruction exceptions (but hopefully most platforms do).
Pinning the test to a subset of cpus with taskset will also restrict the hwprobe calls to that set.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiao Wang <xiao.w.wang@intel.com> Link: https://lore.kernel.org/r/20230918131518.56803-14-ajones@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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