"98c4b3661b5aee0e583d17d6304f6489c0f41155" (history) in projects: linux

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/linux/drivers/clk/tegra/
H A D	clk-id.h	`diff 98c4b3661b5aee0e583d17d6304f6489c0f41155 Mon Apr 20 15:05:33 CEST 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock This clock is of the same type as dpaux and is added to feed into the second DPAUX block used in conjunction with SOR1. Signed-off-by: Thierry Reding <treding@nvidia.com>`
H A D	clk-tegra-periph.c	`diff 98c4b3661b5aee0e583d17d6304f6489c0f41155 Mon Apr 20 15:05:33 CEST 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock This clock is of the same type as dpaux and is added to feed into the second DPAUX block used in conjunction with SOR1. Signed-off-by: Thierry Reding <treding@nvidia.com>`
H A D	clk-tegra210.c	`diff 98c4b3661b5aee0e583d17d6304f6489c0f41155 Mon Apr 20 15:05:33 CEST 2015 Thierry Reding <treding@nvidia.com> clk: tegra: Add dpaux1 clock This clock is of the same type as dpaux and is added to feed into the second DPAUX block used in conjunction with SOR1. Signed-off-by: Thierry Reding <treding@nvidia.com>`