Searched hist:"940 f6b48a130e0a33cb8bd397dd0e277166470ad" (Results 1 – 4 of 4) sorted by relevance
| /linux/arch/mips/kernel/ |
| H A D | smp-up.c | 940f6b48a130e0a33cb8bd397dd0e277166470ad Sat Nov 24 23:33:28 CET 2007 Ralf Baechle <ralf@linux-mips.org> [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | csrc-r4k.c | 940f6b48a130e0a33cb8bd397dd0e277166470ad Sat Nov 24 23:33:28 CET 2007 Ralf Baechle <ralf@linux-mips.org> [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | time.c | diff 940f6b48a130e0a33cb8bd397dd0e277166470ad Sat Nov 24 23:33:28 CET 2007 Ralf Baechle <ralf@linux-mips.org> [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | Makefile | diff 940f6b48a130e0a33cb8bd397dd0e277166470ad Sat Nov 24 23:33:28 CET 2007 Ralf Baechle <ralf@linux-mips.org> [MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|