| /linux/arch/mips/alchemy/common/ |
| H A D | usb.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/sibyte/bcm1480/ |
| H A D | setup.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/sibyte/sb1250/ |
| H A D | setup.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/sni/ |
| H A D | setup.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/bcm63xx/ |
| H A D | cpu.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/include/asm/mach-au1x00/ |
| H A D | au1000.h | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/mti-malta/ |
| H A D | malta-time.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/include/asm/ |
| H A D | cpu.h | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/mm/ |
| H A D | c-r4k.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/kernel/ |
| H A D | cpu-probe.c | diff 8ff374b9c296b96484d5e63b45b22d0862ffee8f Tue Sep 17 17:58:10 CEST 2013 Maciej W. Rozycki <macro@linux-mips.org> MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks
Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|