Searched hist:"8 c66bbdc4fbf3c297ebc8edf71f359e4a132c9db" (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/dma/idxd/ |
| H A D | sysfs.c | diff 8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db Tue Apr 20 20:46:28 CEST 2021 Dave Jiang <dave.jiang@intel.com> dmaengine: idxd: add support for readonly config mode
The read-only configuration mode is defined by the DSA spec as a mode of
the device WQ configuration. When GENCAP register bit 31 is set to 0,
the device is in RO mode and group configuration and some fields of the
workqueue configuration registers are read-only and reflect the fixed
configuration of the device. Add support for RO mode. The driver will
load the values from the registers directly setup all the internally
cached data structures based on the device configuration.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161894438847.3202472.6317563824045432727.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | idxd.h | diff 8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db Tue Apr 20 20:46:28 CEST 2021 Dave Jiang <dave.jiang@intel.com> dmaengine: idxd: add support for readonly config mode
The read-only configuration mode is defined by the DSA spec as a mode of
the device WQ configuration. When GENCAP register bit 31 is set to 0,
the device is in RO mode and group configuration and some fields of the
workqueue configuration registers are read-only and reflect the fixed
configuration of the device. Add support for RO mode. The driver will
load the values from the registers directly setup all the internally
cached data structures based on the device configuration.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161894438847.3202472.6317563824045432727.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | init.c | diff 8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db Tue Apr 20 20:46:28 CEST 2021 Dave Jiang <dave.jiang@intel.com> dmaengine: idxd: add support for readonly config mode
The read-only configuration mode is defined by the DSA spec as a mode of
the device WQ configuration. When GENCAP register bit 31 is set to 0,
the device is in RO mode and group configuration and some fields of the
workqueue configuration registers are read-only and reflect the fixed
configuration of the device. Add support for RO mode. The driver will
load the values from the registers directly setup all the internally
cached data structures based on the device configuration.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161894438847.3202472.6317563824045432727.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | device.c | diff 8c66bbdc4fbf3c297ebc8edf71f359e4a132c9db Tue Apr 20 20:46:28 CEST 2021 Dave Jiang <dave.jiang@intel.com> dmaengine: idxd: add support for readonly config mode
The read-only configuration mode is defined by the DSA spec as a mode of
the device WQ configuration. When GENCAP register bit 31 is set to 0,
the device is in RO mode and group configuration and some fields of the
workqueue configuration registers are read-only and reflect the fixed
configuration of the device. Add support for RO mode. The driver will
load the values from the registers directly setup all the internally
cached data structures based on the device configuration.
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/161894438847.3202472.6317563824045432727.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|