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| /linux/arch/riscv/boot/dts/starfive/ |
| H A D | jh7110.dtsi | diff 87ddf5b1096467d24584ea61de0580776722d961 Tue Aug 08 16:15:58 CEST 2023 Jia Jie Ho <jiajie.ho@starfivetech.com> riscv: dts: starfive - Add hwrng node for JH7110 SoC
Add hardware rng controller node for StarFive JH7110 SoC.
Co-developed-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jenny Zhang <jenny.zhang@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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