Searched hist:"7 d71db537b01a6beadbe45a4e6e302272110c2c0" (Results 1 – 4 of 4) sorted by relevance
/linux/arch/x86/include/asm/ |
H A D | cacheinfo.h | diff 7d71db537b01a6beadbe45a4e6e302272110c2c0 Wed Nov 02 08:47:04 CET 2022 Juergen Gross <jgross@suse.com> x86/mtrr: Disentangle MTRR init from PAT init
Add a main cache_cpu_init() init routine which initializes MTRR and/or PAT support depending on what has been detected on the system.
Leave the MTRR-specific initialization in a MTRR-specific init function where the smp_changes_mask setting happens now with caches disabled.
This global mask update was done with caches enabled before probably because atomic operations while running uncached might have been quite expensive.
But since only systems with a broken BIOS should ever require to set any bit in smp_changes_mask, hurting those devices with a penalty of a few microseconds during boot shouldn't be a real issue.
Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20221102074713.21493-8-jgross@suse.com Signed-off-by: Borislav Petkov <bp@suse.de>
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H A D | mtrr.h | diff 7d71db537b01a6beadbe45a4e6e302272110c2c0 Wed Nov 02 08:47:04 CET 2022 Juergen Gross <jgross@suse.com> x86/mtrr: Disentangle MTRR init from PAT init
Add a main cache_cpu_init() init routine which initializes MTRR and/or PAT support depending on what has been detected on the system.
Leave the MTRR-specific initialization in a MTRR-specific init function where the smp_changes_mask setting happens now with caches disabled.
This global mask update was done with caches enabled before probably because atomic operations while running uncached might have been quite expensive.
But since only systems with a broken BIOS should ever require to set any bit in smp_changes_mask, hurting those devices with a penalty of a few microseconds during boot shouldn't be a real issue.
Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20221102074713.21493-8-jgross@suse.com Signed-off-by: Borislav Petkov <bp@suse.de>
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/linux/arch/x86/kernel/cpu/ |
H A D | cacheinfo.c | diff 7d71db537b01a6beadbe45a4e6e302272110c2c0 Wed Nov 02 08:47:04 CET 2022 Juergen Gross <jgross@suse.com> x86/mtrr: Disentangle MTRR init from PAT init
Add a main cache_cpu_init() init routine which initializes MTRR and/or PAT support depending on what has been detected on the system.
Leave the MTRR-specific initialization in a MTRR-specific init function where the smp_changes_mask setting happens now with caches disabled.
This global mask update was done with caches enabled before probably because atomic operations while running uncached might have been quite expensive.
But since only systems with a broken BIOS should ever require to set any bit in smp_changes_mask, hurting those devices with a penalty of a few microseconds during boot shouldn't be a real issue.
Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20221102074713.21493-8-jgross@suse.com Signed-off-by: Borislav Petkov <bp@suse.de>
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/linux/arch/x86/kernel/cpu/mtrr/ |
H A D | generic.c | diff 7d71db537b01a6beadbe45a4e6e302272110c2c0 Wed Nov 02 08:47:04 CET 2022 Juergen Gross <jgross@suse.com> x86/mtrr: Disentangle MTRR init from PAT init
Add a main cache_cpu_init() init routine which initializes MTRR and/or PAT support depending on what has been detected on the system.
Leave the MTRR-specific initialization in a MTRR-specific init function where the smp_changes_mask setting happens now with caches disabled.
This global mask update was done with caches enabled before probably because atomic operations while running uncached might have been quite expensive.
But since only systems with a broken BIOS should ever require to set any bit in smp_changes_mask, hurting those devices with a penalty of a few microseconds during boot shouldn't be a real issue.
Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20221102074713.21493-8-jgross@suse.com Signed-off-by: Borislav Petkov <bp@suse.de>
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