Home
last modified time | relevance | path

Searched hist:"77 fad8bfb1d2f8225b05e4ea34457875fcfae37e" (Results 1 – 4 of 4) sorted by relevance

/linux/tools/testing/selftests/powerpc/tm/
H A Dtm-unavailable.c77fad8bfb1d2f8225b05e4ea34457875fcfae37e Wed Nov 01 20:23:41 CET 2017 Gustavo Romero <gromero@linux.vnet.ibm.com> selftests/powerpc: Check FP/VEC on exception in TM

Add a self test to check if FP/VEC/VSX registers are sane (restored
correctly) after a FP/VEC/VSX unavailable exception is caught during a
transaction.

This test checks all possibilities in a thread regarding the combination
of MSR.[FP|VEC] states in a thread and for each scenario raises a
FP/VEC/VSX unavailable exception in transactional state, verifying if
vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg
sets, are not corrupted.

Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com>
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
H A Dtm.hdiff 77fad8bfb1d2f8225b05e4ea34457875fcfae37e Wed Nov 01 20:23:41 CET 2017 Gustavo Romero <gromero@linux.vnet.ibm.com> selftests/powerpc: Check FP/VEC on exception in TM

Add a self test to check if FP/VEC/VSX registers are sane (restored
correctly) after a FP/VEC/VSX unavailable exception is caught during a
transaction.

This test checks all possibilities in a thread regarding the combination
of MSR.[FP|VEC] states in a thread and for each scenario raises a
FP/VEC/VSX unavailable exception in transactional state, verifying if
vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg
sets, are not corrupted.

Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com>
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
H A D.gitignorediff 77fad8bfb1d2f8225b05e4ea34457875fcfae37e Wed Nov 01 20:23:41 CET 2017 Gustavo Romero <gromero@linux.vnet.ibm.com> selftests/powerpc: Check FP/VEC on exception in TM

Add a self test to check if FP/VEC/VSX registers are sane (restored
correctly) after a FP/VEC/VSX unavailable exception is caught during a
transaction.

This test checks all possibilities in a thread regarding the combination
of MSR.[FP|VEC] states in a thread and for each scenario raises a
FP/VEC/VSX unavailable exception in transactional state, verifying if
vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg
sets, are not corrupted.

Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com>
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
H A DMakefilediff 77fad8bfb1d2f8225b05e4ea34457875fcfae37e Wed Nov 01 20:23:41 CET 2017 Gustavo Romero <gromero@linux.vnet.ibm.com> selftests/powerpc: Check FP/VEC on exception in TM

Add a self test to check if FP/VEC/VSX registers are sane (restored
correctly) after a FP/VEC/VSX unavailable exception is caught during a
transaction.

This test checks all possibilities in a thread regarding the combination
of MSR.[FP|VEC] states in a thread and for each scenario raises a
FP/VEC/VSX unavailable exception in transactional state, verifying if
vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg
sets, are not corrupted.

Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com>
Signed-off-by: Breno Leitao <leitao@debian.org>
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>