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/linux/drivers/gpu/drm/i915/gt/ |
H A D | intel_gt_regs.h | diff 7649a5d1f263b8cc5c2827ef0443ead9bee9ae0e Thu Jan 26 00:41:59 CET 2023 Matt Roper <matthew.d.roper@intel.com> drm/i915/xehp: Annotate a couple more workaround registers as MCR
GAMSTLB_CTRL and GAMCNTRL_CTRL became multicast/replicated registers on Xe_HP. They should be defined accordingly and use MCR-aware operations.
These registers have only been used for some dg2/xehpsdv workarounds, so this fix is mostly just for consistency/future-proofing; even lacking the MCR annotation, workarounds will always be properly applied in a multicast manner on these platforms.
Cc: Gustavo Sousa <gustavo.sousa@intel.com> Fixes: 58bc2453ab8a ("drm/i915: Define multicast registers as a new type") Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125234159.3015385-3-matthew.d.roper@intel.com
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H A D | intel_workarounds.c | diff 7649a5d1f263b8cc5c2827ef0443ead9bee9ae0e Thu Jan 26 00:41:59 CET 2023 Matt Roper <matthew.d.roper@intel.com> drm/i915/xehp: Annotate a couple more workaround registers as MCR
GAMSTLB_CTRL and GAMCNTRL_CTRL became multicast/replicated registers on Xe_HP. They should be defined accordingly and use MCR-aware operations.
These registers have only been used for some dg2/xehpsdv workarounds, so this fix is mostly just for consistency/future-proofing; even lacking the MCR annotation, workarounds will always be properly applied in a multicast manner on these platforms.
Cc: Gustavo Sousa <gustavo.sousa@intel.com> Fixes: 58bc2453ab8a ("drm/i915: Define multicast registers as a new type") Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230125234159.3015385-3-matthew.d.roper@intel.com
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