Searched hist:"7192454558532101229629 a8575d161013f3a7cb" (Results 1 – 7 of 7) sorted by relevance
| /freebsd/sys/riscv/allwinner/ |
| H A D | d1_padconf.c | 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| H A D | files.allwinner | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| /freebsd/share/man/man4/man4.arm/ |
| H A D | aw_gpio.4 | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| /freebsd/sys/arm/allwinner/ |
| H A D | allwinner_pinctrl.h | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| H A D | aw_gpio.c | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| /freebsd/sys/riscv/conf/ |
| H A D | std.allwinner | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|
| H A D | GENERIC | diff 7192454558532101229629a8575d161013f3a7cb Tue Dec 10 22:22:40 CET 2024 Julien Cassette <julien.cassette@gmail.com> aw_gpio: support Allwinner D1 GPIO
The GPIO controls the multiplexing of the D1 pins to its peripherals,
so this adds the definitions needed by the aw_gpio driver to support
the D1.
Also, this modifies the aw_gpio driver to support the differences of
the D1 controller:
- pins can have up to 15 functions
- each port is mapped with an alignment of 0x30
- CFG registers have 4 bits per pin
- DRV registers have 4 bits per pin
- the offset of PULL registers is 0x24
Signed-off-by: Julien Cassette <julien.cassette@gmail.com>
Reviewed by: mhorne
Differential Revision: https://reviews.freebsd.org/D35593
|