Searched hist:"6 bf150aef236fbb6d9fd299081fa8f1f0f6fde6f" (Results 1 – 6 of 6) sorted by relevance
| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sa8775p.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
| H A D | sm6375.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
| H A D | sm8550.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
| H A D | sm8350.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
| H A D | sm8150.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|
| H A D | sm8250.dtsi | diff 6bf150aef236fbb6d9fd299081fa8f1f0f6fde6f Thu Jan 25 19:59:19 CET 2024 Krishna Kurapati <quic_kriskura@quicinc.com> arm64: dts: qcom: Fix hs_phy_irq for non-QUSB2 targets
On non-QUSB2 targets (like the ones that use femto phys, M31 phy, eusb2
phy), many of the QCOM DTs are missing the IRQ for either hs_phy_irq or
pwr_event. In one case, the hs_phy_irq was incorrectly defined with the
latter's IRQ number. Since the DT must describe the hw whether or not
the driver uses these interrupts, fix and add the missing entries in order
to describe the HW completely and accurately.
Also modify order of interrupts in accordance to bindings update.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Link: https://lore.kernel.org/r/20240125185921.5062-3-quic_kriskura@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
|