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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dpwrseq.hdiff 692f5deccdae665925cd9542d460fe4771835be5 Sat Mar 17 15:26:07 CET 2018 Kevin Lo <kevlo@kevlo.org> rtlwifi: correct comment

Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1)
to 0 which means disable WL suspend, not enable WL suspend.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dpwrseq.hdiff 692f5deccdae665925cd9542d460fe4771835be5 Sat Mar 17 15:26:07 CET 2018 Kevin Lo <kevlo@kevlo.org> rtlwifi: correct comment

Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1)
to 0 which means disable WL suspend, not enable WL suspend.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Dpwrseq.hdiff 692f5deccdae665925cd9542d460fe4771835be5 Sat Mar 17 15:26:07 CET 2018 Kevin Lo <kevlo@kevlo.org> rtlwifi: correct comment

Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1)
to 0 which means disable WL suspend, not enable WL suspend.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dpwrseq.hdiff 692f5deccdae665925cd9542d460fe4771835be5 Sat Mar 17 15:26:07 CET 2018 Kevin Lo <kevlo@kevlo.org> rtlwifi: correct comment

Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1)
to 0 which means disable WL suspend, not enable WL suspend.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
H A Dpwrseq.hdiff 692f5deccdae665925cd9542d460fe4771835be5 Sat Mar 17 15:26:07 CET 2018 Kevin Lo <kevlo@kevlo.org> rtlwifi: correct comment

Correct comment. Set bit 3 and bit 4 of 0x0005 register (REG_APS_FSMCO + 1)
to 0 which means disable WL suspend, not enable WL suspend.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>