Searched hist:"62 cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8" (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/mips/mm/ |
| H A D | Makefile | diff 62cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8 Tue Jan 31 18:18:45 CET 2012 Florian Fainelli <florian@openwrt.org> MIPS: introduce CPU_R4K_CACHE_TLB
R4K-style CPUs having common code to support their caches and tlb have this
boolean defined by default. Allows us to remove some lines in
arch/mips/mm/Makefile.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/3328/
Signed-off-by: John Crispin <blogic@openwrt.org>
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| /linux/arch/mips/ |
| H A D | Kconfig | diff 62cedc4fde2d15b08e4502aa3fb2d9d798f3ccd8 Tue Jan 31 18:18:45 CET 2012 Florian Fainelli <florian@openwrt.org> MIPS: introduce CPU_R4K_CACHE_TLB
R4K-style CPUs having common code to support their caches and tlb have this
boolean defined by default. Allows us to remove some lines in
arch/mips/mm/Makefile.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/3328/
Signed-off-by: John Crispin <blogic@openwrt.org>
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