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| /linux/drivers/phy/ralink/ |
| H A D | phy-mt7621-pci.c | diff 60ece833ccd00c4fc9b10bbce2fa6291f61c6230 Sat May 08 09:09:27 CEST 2021 Sergio Paracuellos <sergio.paracuellos@gmail.com> phy: ralink: phy-mt7621-pci: use kernel clock APIS
MT7621 SoC clock driver has already mainlined in
'commit 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC")'
This allow us to properly use kernel clock apis to get
the clock frequency needed for the phy configuration
instead of use custom architecture code to do the same.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20210508070930.5290-4-sergio.paracuellos@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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