Searched hist:"60 bf0a39842eb042bbdc4539285c7e524011fc2d" (Results 1 – 1 of 1) sorted by relevance
| /linux/arch/riscv/boot/dts/starfive/ |
| H A D | jh7110.dtsi | 60bf0a39842eb042bbdc4539285c7e524011fc2d Sat Apr 01 13:19:31 CEST 2023 Emil Renner Berthing <kernel@esmil.dk> riscv: dts: starfive: Add initial StarFive JH7110 device tree
Add initial device tree for the JH7110 RISC-V SoC by StarFive
Technology Ltd.
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
[conor: squashed in the removal of the S7's non-existent mmu]
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
|