Searched hist:"5 f5249497bd7ed65d90cac36c3c3dabcda2903dd" (Results 1 – 1 of 1) sorted by relevance
| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a774a1.dtsi | diff 5f5249497bd7ed65d90cac36c3c3dabcda2903dd Wed Jun 12 16:20:53 CEST 2019 Biju Das <biju.das@bp.renesas.com> arm64: dts: renesas: r8a774a1: Add CPU capacity-dmips-mhz
Set the capacity-dmips-mhz for RZ/G2M(r8a774a1) SoC, that is based on
dhrystone.
Based on work done by Gaku Inami <gaku.inami.xw@bp.renesas.com> for
r8a7796 SoC.
The average dhrystone result for 5 iterations is as below:
r8a774a1 SoC (CA57x2 + CA53x4)
CPU max-freq dhrystone
---------------------------------
CA57 1500 MHz 11428571 lps/s
CA53 1200 MHz 5000000 lps/s
From this, CPU capacity-dmips-mhz for CA57 and CA53 are calculated
as follows:
r8a774a1 SoC
CA57 : 1024 / (11428571 / 1500) * (11428571 / 1500) = 1024
CA53 : 1024 / (11428571 / 1500) * ( 5000000 / 1200) = 560
Since each CPUs have different max frequencies, the final CPU
capacities of A53 scaled by the above difference is as below
$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
1024
1024
448
448
448
448
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|