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| H A D | r8a779g0-cpg-mssr.c | diff 5ab16198b431ca4885dbcc3433527fdf5b66be3c Tue Nov 14 13:22:52 CET 2023 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> clk: renesas: r8a779g0: Add PCIe clocks
Add the PCIe module clocks, which are used by the PCIe modules on the
Renesas R-Car V4H (R8A779G0) SoC. Note that the following descriptions
in the hardware manual Rev.0.81 about the PCIe module clocks are
incorrect:
9.2.1.7 Software Reset Register 6 (SRCR6)
9.2.1.12 Software Reset Register 11 (SRCR11)
9.2.3.7 Module Stop Control Register 6 (MSTPCR6)
Please refer to Figures 104.3[ab] instead.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231114122252.2266799-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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