Searched hist:"52 bc5ea6edde35bc65ed6ecd7639534e78002c74" (Results 1 – 3 of 3) sorted by relevance
/linux/drivers/clk/renesas/ |
H A D | r8a774b1-cpg-mssr.c | diff 52bc5ea6edde35bc65ed6ecd7639534e78002c74 Tue Jun 16 18:26:26 CEST 2020 Ulrich Hecht <uli+renesas@fpond.eu> clk: renesas: rzg2: Mark RWDT clocks as critical
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change to the following SoCs: r8a774a1, r8a774b1 and r8a774c0.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200616162626.27944-4-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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H A D | r8a774c0-cpg-mssr.c | diff 52bc5ea6edde35bc65ed6ecd7639534e78002c74 Tue Jun 16 18:26:26 CEST 2020 Ulrich Hecht <uli+renesas@fpond.eu> clk: renesas: rzg2: Mark RWDT clocks as critical
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change to the following SoCs: r8a774a1, r8a774b1 and r8a774c0.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200616162626.27944-4-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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H A D | r8a774a1-cpg-mssr.c | diff 52bc5ea6edde35bc65ed6ecd7639534e78002c74 Tue Jun 16 18:26:26 CEST 2020 Ulrich Hecht <uli+renesas@fpond.eu> clk: renesas: rzg2: Mark RWDT clocks as critical
Ensures RWDT remains alert throughout the boot process if enabled.
This patch applies the change to the following SoCs: r8a774a1, r8a774b1 and r8a774c0.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200616162626.27944-4-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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