Searched hist:"52420 e483d3e1562f11a208d3c540b27b5e5dbf4" (Results 1 – 4 of 4) sorted by relevance
/linux/arch/riscv/include/asm/ |
H A D | hwprobe.h | diff 52420e483d3e1562f11a208d3c540b27b5e5dbf4 Tue Jul 02 05:37:31 CEST 2024 Palmer Dabbelt <palmer@rivosinc.com> RISC-V: Provide the frequency of time CSR via hwprobe
The RISC-V architecture makes a real time counter CSR (via RDTIME instruction) available for applications in U-mode but there is no architected mechanism for an application to discover the frequency the counter is running at. Some applications (e.g., DPDK) use the time counter for basic performance analysis as well as fine grained time-keeping.
Add support to the hwprobe system call to export the time CSR frequency to code running in U-mode.
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Punit Agrawal <punit.agrawal@bytedance.com> Link: https://lore.kernel.org/r/20240702033731.71955-2-cuiyunhui@bytedance.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/linux/arch/riscv/kernel/ |
H A D | sys_hwprobe.c | diff 52420e483d3e1562f11a208d3c540b27b5e5dbf4 Tue Jul 02 05:37:31 CEST 2024 Palmer Dabbelt <palmer@rivosinc.com> RISC-V: Provide the frequency of time CSR via hwprobe
The RISC-V architecture makes a real time counter CSR (via RDTIME instruction) available for applications in U-mode but there is no architected mechanism for an application to discover the frequency the counter is running at. Some applications (e.g., DPDK) use the time counter for basic performance analysis as well as fine grained time-keeping.
Add support to the hwprobe system call to export the time CSR frequency to code running in U-mode.
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Punit Agrawal <punit.agrawal@bytedance.com> Link: https://lore.kernel.org/r/20240702033731.71955-2-cuiyunhui@bytedance.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/linux/Documentation/arch/riscv/ |
H A D | hwprobe.rst | diff 52420e483d3e1562f11a208d3c540b27b5e5dbf4 Tue Jul 02 05:37:31 CEST 2024 Palmer Dabbelt <palmer@rivosinc.com> RISC-V: Provide the frequency of time CSR via hwprobe
The RISC-V architecture makes a real time counter CSR (via RDTIME instruction) available for applications in U-mode but there is no architected mechanism for an application to discover the frequency the counter is running at. Some applications (e.g., DPDK) use the time counter for basic performance analysis as well as fine grained time-keeping.
Add support to the hwprobe system call to export the time CSR frequency to code running in U-mode.
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Punit Agrawal <punit.agrawal@bytedance.com> Link: https://lore.kernel.org/r/20240702033731.71955-2-cuiyunhui@bytedance.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/linux/arch/riscv/include/uapi/asm/ |
H A D | hwprobe.h | diff 52420e483d3e1562f11a208d3c540b27b5e5dbf4 Tue Jul 02 05:37:31 CEST 2024 Palmer Dabbelt <palmer@rivosinc.com> RISC-V: Provide the frequency of time CSR via hwprobe
The RISC-V architecture makes a real time counter CSR (via RDTIME instruction) available for applications in U-mode but there is no architected mechanism for an application to discover the frequency the counter is running at. Some applications (e.g., DPDK) use the time counter for basic performance analysis as well as fine grained time-keeping.
Add support to the hwprobe system call to export the time CSR frequency to code running in U-mode.
Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com> Reviewed-by: Evan Green <evan@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org> Acked-by: Punit Agrawal <punit.agrawal@bytedance.com> Link: https://lore.kernel.org/r/20240702033731.71955-2-cuiyunhui@bytedance.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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