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/linux/drivers/clk/samsung/
H A Dclk-exynosautov920.c485e13fe2fb649e60eb49d8bec4404da215c1f5b Thu Aug 22 01:26:52 CEST 2024 Sunyeal Hong <sunyeal.hong@samsung.com> clk: samsung: add top clock support for ExynosAuto v920 SoC

This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-5-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
H A DMakefilediff 485e13fe2fb649e60eb49d8bec4404da215c1f5b Thu Aug 22 01:26:52 CEST 2024 Sunyeal Hong <sunyeal.hong@samsung.com> clk: samsung: add top clock support for ExynosAuto v920 SoC

This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.

Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-5-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>