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| /linux/drivers/clk/sunxi-ng/ |
| H A D | ccu-sun8i-r.c | diff 47d64fef1f3ffbdf960d3330b9865fc9f12fdf84 Sun Dec 29 03:59:20 CET 2019 Samuel Holland <samuel@sholland.org> clk: sunxi-ng: sun8i-r: Fix divider on APB0 clock
According to the BSP source code, the APB0 clock on the H3 and H5 has a
normal M divider, not a power-of-two divider. This matches the hardware
in the A83T (as described in both the BSP source code and the manual).
Since the A83T and H3/A64 clocks are actually the same, we can merge the
definitions.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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