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H A Drs485.yamldiff 45c1d967a762ad8df7e1ccfa4a22dd77e2efa3b8 Fri Dec 02 11:41:24 CET 2022 Christoph Niedermaier <cniedermaier@dh-electronics.com> dt-bindings: serial: rs485: Add GPIO controlling RX enable during TX

Add a binding for a generic definition of an output GPIO that sets the
state of rs485-rx-during-tx. The idea is that the hardware already controls
the option receiving during sending before it gets to the signal receiving
hardware. The standard RS485 is a half-duplex bus that in most cases is
driven by an UART controller. The advantage of using this GPIO is that it
is independent of the capabilities of the UART core and the UART driver.
On the hardware side the interface to the bus is controlled by a transceiver,
that has a pin called RE (RX Enable) or similar, which connects the bus to
the RX signal of the UART controller. The GPIO can switch between two states
to control the RE pin via an electrical circuit:
- Active:
The RE pin is always active. The UART RX see everything on the bus and
therefore also what happens with the TX signal on the bus.
- Inactive:
The RE pin is always active, but during sending on the bus the pin RE is
inactive. So basically the receiving during sending is suppressed.

A possible circuit diagram could look like this:
┌──────────────────┐
│ RS485 │
TX ───────────────┤D │
│ Transceiver │
RTS ────┬──────────┤DE │
│ │ │
│ ┌─────┐ │ │
└─┤& │ │ │
│ ├──┤!RE │
!rx_during_tx_gpio ──────┤ │ │ │
└─────┘ │ │
│ │
RX ───────────────┤R │
│ │
└──────────────────┘

Here the RTS pin of the UART core is used to control TX via the transceiver
pin DE (Drive Enable). RE and rx_during_tx_gpio are active low.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221202104127.122761-1-cniedermaier@dh-electronics.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>