Searched hist:"43 dea469e99b10ecc967a3576e50a5d416daf13c" (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_gt_regs.h | diff 43dea469e99b10ecc967a3576e50a5d416daf13c Fri Oct 27 21:50:52 CEST 2023 Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> drm/i915/mtl: Add Wa_14019821291
This workaround is primarily implemented by the BIOS. However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.
v2: Declare regs in intel_gt_regs.h (Matt Roper)
v3: Shift WA implementation before calculation of *base (Matt Roper)
v4:
- Change condition gscpmi base to be fall in DSM range.(Matt Roper)
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231027195052.3676632-1-dnyaneshwar.bhadane@intel.com
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| /linux/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_stolen.c | diff 43dea469e99b10ecc967a3576e50a5d416daf13c Fri Oct 27 21:50:52 CEST 2023 Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> drm/i915/mtl: Add Wa_14019821291
This workaround is primarily implemented by the BIOS. However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.
v2: Declare regs in intel_gt_regs.h (Matt Roper)
v3: Shift WA implementation before calculation of *base (Matt Roper)
v4:
- Change condition gscpmi base to be fall in DSM range.(Matt Roper)
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231027195052.3676632-1-dnyaneshwar.bhadane@intel.com
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