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H A Dfsl_esai.h43d24e76b69826ce32292f47060ad78cdd0197fa Fri Jan 10 10:54:06 CET 2014 Nicolin Chen <Guangyu.Chen@freescale.com> ASoC: fsl_esai: Add ESAI CPU DAI driver

This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:

- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
there is no pin conflict occurring to it. ]

- Independent (asynchronous mode) or shared (synchronous mode) transmit and
receive sections with separate or shared internal/external clocks and frame
syncs, operating in Master or Slave mode.
[ Current ALSA seems not to allow CPU DAI drivers to configure DAI format
separately for PLAYBACK and CAPTURE. So this first version only supports
the case that uses the same DAI format for both directions. ]

- Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B.

- Programmable word length (8, 16, 20 or 24bits)

- Flexible selection between system clock or external oscillator as input
clock source, programmable internal clock divider and frame sync generation.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
H A DKconfigdiff 43d24e76b69826ce32292f47060ad78cdd0197fa Fri Jan 10 10:54:06 CET 2014 Nicolin Chen <Guangyu.Chen@freescale.com> ASoC: fsl_esai: Add ESAI CPU DAI driver

This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:

- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
there is no pin conflict occurring to it. ]

- Independent (asynchronous mode) or shared (synchronous mode) transmit and
receive sections with separate or shared internal/external clocks and frame
syncs, operating in Master or Slave mode.
[ Current ALSA seems not to allow CPU DAI drivers to configure DAI format
separately for PLAYBACK and CAPTURE. So this first version only supports
the case that uses the same DAI format for both directions. ]

- Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B.

- Programmable word length (8, 16, 20 or 24bits)

- Flexible selection between system clock or external oscillator as input
clock source, programmable internal clock divider and frame sync generation.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>