Searched hist:"41 f93a496af2696d970cbcb3814261a9b32dbaa2" (Results 1 – 3 of 3) sorted by relevance
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-evk-mx8-dlvds-lcd1.dtso | 41f93a496af2696d970cbcb3814261a9b32dbaa2 Wed May 08 12:00:13 CEST 2024 Liu Ying <victor.liu@nxp.com> arm64: dts: imx8mp-evk: Add MX8-DLVDS-LCD1 display module support
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8MP EVK.
Specify 148.5MHz clock frequency in panel-timing node to accommodate
3.5-fold 519.75MHz media_ldb clock which is derived from 1.0395GHz
video_pll1 clock.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
| H A D | imx8mp-evk.dts | diff 41f93a496af2696d970cbcb3814261a9b32dbaa2 Wed May 08 12:00:13 CEST 2024 Liu Ying <victor.liu@nxp.com> arm64: dts: imx8mp-evk: Add MX8-DLVDS-LCD1 display module support
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8MP EVK.
Specify 148.5MHz clock frequency in panel-timing node to accommodate
3.5-fold 519.75MHz media_ldb clock which is derived from 1.0395GHz
video_pll1 clock.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
| H A D | Makefile | diff 41f93a496af2696d970cbcb3814261a9b32dbaa2 Wed May 08 12:00:13 CEST 2024 Liu Ying <victor.liu@nxp.com> arm64: dts: imx8mp-evk: Add MX8-DLVDS-LCD1 display module support
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8MP EVK.
Specify 148.5MHz clock frequency in panel-timing node to accommodate
3.5-fold 519.75MHz media_ldb clock which is derived from 1.0395GHz
video_pll1 clock.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|