Searched hist:"414002 f1bb8e5a7824ed43373d8de9ba7c658301" (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_ddi.c | diff 414002f1bb8e5a7824ed43373d8de9ba7c658301 Wed May 19 02:06:23 CEST 2021 Imre Deak <imre.deak@intel.com> drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
On ADL_P besides programming the PLL accordingly the DP/HDMI link rate
should be also programmed to the DDI_BUF_CTL register, do that.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-16-lucas.demarchi@intel.com
|
| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | diff 414002f1bb8e5a7824ed43373d8de9ba7c658301 Wed May 19 02:06:23 CEST 2021 Imre Deak <imre.deak@intel.com> drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
On ADL_P besides programming the PLL accordingly the DP/HDMI link rate
should be also programmed to the DDI_BUF_CTL register, do that.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210519000625.3184321-16-lucas.demarchi@intel.com
|