Searched hist:"3 c5c32457d7da76d077effc08176d3ad2e7536f9" (Results 1 – 3 of 3) sorted by relevance
/linux/arch/x86/kvm/mmu/ |
H A D | spte.c | diff 3c5c32457d7da76d077effc08176d3ad2e7536f9 Tue Apr 19 13:17:04 CEST 2022 Kai Huang <kai.huang@intel.com> KVM: VMX: Include MKTME KeyID bits in shadow_zero_check
Intel MKTME KeyID bits (including Intel TDX private KeyID bits) should never be set to SPTE. Set shadow_me_value to 0 and shadow_me_mask to include all MKTME KeyID bits to include them to shadow_zero_check.
Signed-off-by: Kai Huang <kai.huang@intel.com> Message-Id: <27bc10e97a3c0b58a4105ff9107448c190328239.1650363789.git.kai.huang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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/linux/arch/x86/kvm/ |
H A D | mmu.h | diff 3c5c32457d7da76d077effc08176d3ad2e7536f9 Tue Apr 19 13:17:04 CEST 2022 Kai Huang <kai.huang@intel.com> KVM: VMX: Include MKTME KeyID bits in shadow_zero_check
Intel MKTME KeyID bits (including Intel TDX private KeyID bits) should never be set to SPTE. Set shadow_me_value to 0 and shadow_me_mask to include all MKTME KeyID bits to include them to shadow_zero_check.
Signed-off-by: Kai Huang <kai.huang@intel.com> Message-Id: <27bc10e97a3c0b58a4105ff9107448c190328239.1650363789.git.kai.huang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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/linux/arch/x86/kvm/vmx/ |
H A D | vmx.c | diff 3c5c32457d7da76d077effc08176d3ad2e7536f9 Tue Apr 19 13:17:04 CEST 2022 Kai Huang <kai.huang@intel.com> KVM: VMX: Include MKTME KeyID bits in shadow_zero_check
Intel MKTME KeyID bits (including Intel TDX private KeyID bits) should never be set to SPTE. Set shadow_me_value to 0 and shadow_me_mask to include all MKTME KeyID bits to include them to shadow_zero_check.
Signed-off-by: Kai Huang <kai.huang@intel.com> Message-Id: <27bc10e97a3c0b58a4105ff9107448c190328239.1650363789.git.kai.huang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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