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H A D | fsl_asrc.c | diff 320386343451ab6a3577e0ee200dac56a6182944 Wed Jan 05 12:08:03 CET 2022 Shengjiu Wang <shengjiu.wang@nxp.com> ASoC: fsl_asrc: refine the check of available clock divider
According to RM, the clock divider range is from 1 to 8, clock prescaling ratio may be any power of 2 from 1 to 128. So the supported divider is not all the value between 1 and 1024, just limited value in that range.
Create table for the supported divder and add function to check the clock divider is available by comparing with the table.
Fixes: d0250cf4f2ab ("ASoC: fsl_asrc: Add an option to select internal ratio mode") Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1641380883-20709-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
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