Searched hist:"31354121 bf03dac6498a4236928a38490745d601" (Results 1 – 4 of 4) sorted by relevance
| /linux/arch/arm64/boot/dts/intel/ |
| H A D | socfpga_n5x_socdk.dts | diff 31354121bf03dac6498a4236928a38490745d601 Fri Sep 16 03:45:37 CEST 2022 Dinh Nguyen <dinguyen@kernel.org> arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
|
| H A D | socfpga_agilex_socdk.dts | diff 31354121bf03dac6498a4236928a38490745d601 Fri Sep 16 03:45:37 CEST 2022 Dinh Nguyen <dinguyen@kernel.org> arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
|
| /linux/arch/arm64/boot/dts/altera/ |
| H A D | socfpga_stratix10_socdk.dts | diff 31354121bf03dac6498a4236928a38490745d601 Fri Sep 16 03:45:37 CEST 2022 Dinh Nguyen <dinguyen@kernel.org> arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
|
| H A D | socfpga_stratix10.dtsi | diff 31354121bf03dac6498a4236928a38490745d601 Fri Sep 16 03:45:37 CEST 2022 Dinh Nguyen <dinguyen@kernel.org> arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
|