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/linux/drivers/clk/mediatek/
H A Dclk-mt7622-hif.c2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt7622-aud.c2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt7622-eth.c2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A Dclk-mt7622.c2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A DMakefilediff 2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
H A DKconfigdiff 2fc0a509e4ee858a450f28a4efb430835004dd70 Thu Oct 05 05:50:24 CEST 2017 Sean Wang <sean.wang@mediatek.com> clk: mediatek: add clock support for MT7622 SoC

Add all supported clocks exported from every susbystem found on MT7622 SoC
such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys,
ethsys and audsys.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>