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/titanic_41/usr/src/uts/i86pc/io/pcplusmp/
H A Dapic_regops.cdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible
H A Dapic.cdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible
/titanic_41/usr/src/uts/intel/sys/
H A Darchsystm.hdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible
H A Dx86_archext.hdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible
/titanic_41/usr/src/uts/intel/ia32/ml/
H A Di86_subr.sdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible
/titanic_41/usr/src/uts/i86pc/os/
H A Dcpuid.cdiff 2ef50f010f7a3a07eb5a9f6001b9843fd868e26b Tue Jul 14 19:51:37 CEST 2009 Joe Bonasera <Joe.Bonasera@sun.com> 6848982 32 bit kernel should use %cr8 to access the TPR when possible