Searched hist:"2 e8685a491c1063a4126598b10ecb78d1d20f537" (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8536si-pre.dtsi | 2e8685a491c1063a4126598b10ecb78d1d20f537 Thu Nov 03 22:16:07 CET 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8536DS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
* and moved
PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8536 SoC template
[ marked as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size & cache-size properties missing from
L2-cache node
* Added IP level IEEE 1588 / ptp timer node
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | mpc8536si-post.dtsi | 2e8685a491c1063a4126598b10ecb78d1d20f537 Thu Nov 03 22:16:07 CET 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8536DS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
* and moved
PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8536 SoC template
[ marked as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size & cache-size properties missing from
L2-cache node
* Added IP level IEEE 1588 / ptp timer node
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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