Searched hist:"2 ce7e495dab4647055f6cf300bc66870dc8a7cab" (Results 1 – 1 of 1) sorted by relevance
| /linux/drivers/clk/zynqmp/ |
| H A D | divider.c | diff 2ce7e495dab4647055f6cf300bc66870dc8a7cab Thu Mar 12 22:31:39 CET 2020 Tejas Patel <tejas.patel@xilinx.com> clk: zynqmp: Update fraction clock check from custom type flags
Older firmware version sets BIT(13) in clkflag to mark a
divider as fractional divider. Updated firmware version sets BIT(4)
in type flags to mark a divider as fractional divider since
BIT(13) is defined as CLK_DUTY_CYCLE_PARENT in the common clk
framework flags.
To support both old and new firmware version, consider BIT(13) from
clkflag and BIT(4) from type_flag to check if divider is fractional
or not.
To maintain compatibility BIT(13) of clkflag in firmware will not be
used in future for any purpose and will be marked as unused.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Link: https://lkml.kernel.org/r/1584048699-24186-3-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|