Searched hist:"1 d4ba0b81c1cf2bfc0c55658f53809846ae9de52" (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/soc/fsl/qe/ |
| H A D | tsa.h | 1d4ba0b81c1cf2bfc0c55658f53809846ae9de52 Fri Feb 17 15:56:37 CET 2023 Herve Codina <herve.codina@bootlin.com> soc: fsl: cpm1: Add support for TSA
The TSA (Time Slot Assigner) purpose is to route some
TDM time-slots to other internal serial controllers.
It is available in some PowerQUICC SoC such as the
MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some
enhancement are needed to support Quicc Engine SoCs.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20230217145645.1768659-3-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | tsa.c | 1d4ba0b81c1cf2bfc0c55658f53809846ae9de52 Fri Feb 17 15:56:37 CET 2023 Herve Codina <herve.codina@bootlin.com> soc: fsl: cpm1: Add support for TSA
The TSA (Time Slot Assigner) purpose is to route some
TDM time-slots to other internal serial controllers.
It is available in some PowerQUICC SoC such as the
MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some
enhancement are needed to support Quicc Engine SoCs.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20230217145645.1768659-3-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Makefile | diff 1d4ba0b81c1cf2bfc0c55658f53809846ae9de52 Fri Feb 17 15:56:37 CET 2023 Herve Codina <herve.codina@bootlin.com> soc: fsl: cpm1: Add support for TSA
The TSA (Time Slot Assigner) purpose is to route some
TDM time-slots to other internal serial controllers.
It is available in some PowerQUICC SoC such as the
MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some
enhancement are needed to support Quicc Engine SoCs.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20230217145645.1768659-3-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | Kconfig | diff 1d4ba0b81c1cf2bfc0c55658f53809846ae9de52 Fri Feb 17 15:56:37 CET 2023 Herve Codina <herve.codina@bootlin.com> soc: fsl: cpm1: Add support for TSA
The TSA (Time Slot Assigner) purpose is to route some
TDM time-slots to other internal serial controllers.
It is available in some PowerQUICC SoC such as the
MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some
enhancement are needed to support Quicc Engine SoCs.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20230217145645.1768659-3-herve.codina@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|