Searched hist:"1 c0c13eb935c95fd2ca0b0aca6dd4860487fb242" (Results 1 – 10 of 10) sorted by relevance
| /linux/arch/mips/bcm47xx/ |
| H A D | irq.c | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | time.c | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | serial.c | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | Makefile | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | prom.c | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | setup.c | 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/kernel/ |
| H A D | proc.c | diff 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| H A D | cpu-probe.c | diff 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/mm/ |
| H A D | tlbex.c | diff 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
| /linux/arch/mips/ |
| H A D | Makefile | diff 1c0c13eb935c95fd2ca0b0aca6dd4860487fb242 Tue Sep 25 15:40:12 CEST 2007 Aurelien Jarno <aurelien@aurel32.net> [MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this
is not a mistake in the code.
It originally comes from the OpenWrt patches.
Cc: Michael Buesch <mb@bu3sch.de>
Cc: Felix Fietkau <nbd@openwrt.org>
Cc: Florian Schirmer <jolt@tuxbox.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|