Home
last modified time | relevance | path

Searched hist:"102033 aa92edf302ad31b3bdd7c6fcd2d6910903" (Results 1 – 8 of 8) sorted by relevance

/titanic_41/usr/src/uts/common/sys/
H A Dvmsystm.hdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/sun4u/vm/
H A Dmach_vm_dep.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/sun4/vm/
H A Dvm_dep.hdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
H A Dvm_dep.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/sun4v/cpu/
H A Dniagara2.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/sun4v/vm/
H A Dmach_vm_dep.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/common/os/
H A Dexec.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms
/titanic_41/usr/src/uts/i86pc/vm/
H A Dvm_machdep.cdiff 102033aa92edf302ad31b3bdd7c6fcd2d6910903 Mon Nov 27 22:18:12 CET 2006 dp78419 <none@none> 6488843 Hashed Cache index mode support for Huron
6489149 colorequivszc[] may be set incorrectly on sun4v
6489393 MTYPE_START/MTYPE_NEXT DR race in ASSERT macro
6493685 randomize effective process user stack start address to avoid thrashing caches on sun4v platforms