Searched hist:"0 e125a5facf857567f8bb6dbb1ceefac14b2fa64" (Results 1 – 2 of 2) sorted by relevance
| /linux/include/linux/amba/ |
| H A D | serial.h | diff 0e125a5facf857567f8bb6dbb1ceefac14b2fa64 Fri Jul 08 11:00:39 CEST 2016 Shawn Guo <shawn.guo@linaro.org> tty: amba-pl011: define flag register bits for ZTE device
For some reason we do not really understand, ZTE hardware designers
choose to define PL011 Flag Register bit positions differently from
standard ones as below.
Bit Standard ZTE
-----------------------------------
CTS 0 1
DSR 1 3
BUSY 3 8
RI 8 0
Let's define these bits into vendor data and get ZTE PL011 supported
properly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| /linux/drivers/tty/serial/ |
| H A D | amba-pl011.c | diff 0e125a5facf857567f8bb6dbb1ceefac14b2fa64 Fri Jul 08 11:00:39 CEST 2016 Shawn Guo <shawn.guo@linaro.org> tty: amba-pl011: define flag register bits for ZTE device
For some reason we do not really understand, ZTE hardware designers
choose to define PL011 Flag Register bit positions differently from
standard ones as below.
Bit Standard ZTE
-----------------------------------
CTS 0 1
DSR 1 3
BUSY 3 8
RI 8 0
Let's define these bits into vendor data and get ZTE PL011 supported
properly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|