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/linux/drivers/clk/mediatek/
H A Dclk-mt6795-vdecsys.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-mfg.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-vencsys.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-apmixedsys.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-pericfg.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-infracfg.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-mm.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A Dclk-mt6795-topckgen.c0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A DMakefilediff 0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
H A DKconfigdiff 0d363282bb0c42dd412c9daa0c8a77e84fa32262 Wed Sep 21 11:14:55 CEST 2022 AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> clk: mediatek: Add MediaTek Helio X10 MT6795 clock drivers

Add the clock drivers for the entire clock tree of MediaTek Helio X10
MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen)
and multimedia clocks (mmsys, mfg, vdecsys, vencsys).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>