| /linux/arch/csky/include/asm/ |
| H A D | memory.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | page.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | mmu_context.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | pgalloc.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | processor.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | pgtable.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| /linux/arch/csky/kernel/ |
| H A D | head.S | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | atomic.S | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | vmlinux.lds.S | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | setup.c | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | entry.S | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | smp.c | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| /linux/arch/csky/abiv1/inc/abi/ |
| H A D | ckmmu.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| /linux/arch/csky/abiv2/inc/abi/ |
| H A D | ckmmu.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | entry.h | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| /linux/arch/csky/mm/ |
| H A D | init.c | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| H A D | fault.c | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|
| /linux/arch/csky/ |
| H A D | Kconfig | diff 0c8a32eed1625a65798286fb73fea8710a908545 Mon Sep 07 08:20:18 CEST 2020 Guo Ren <guoren@linux.alibaba.com> csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
|