Searched hist:"0 beb2bd36f6216f455363f47f8ba32fdf26667fb" (Results 1 – 4 of 4) sorted by relevance
| /linux/arch/arm/mach-zynq/ |
| H A D | pm.c | 0beb2bd36f6216f455363f47f8ba32fdf26667fb Tue Sep 02 23:19:09 CEST 2014 Soren Brinkmann <soren.brinkmann@xilinx.com> ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| H A D | Makefile | diff 0beb2bd36f6216f455363f47f8ba32fdf26667fb Tue Sep 02 23:19:09 CEST 2014 Soren Brinkmann <soren.brinkmann@xilinx.com> ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
| H A D | common.h | diff 0beb2bd36f6216f455363f47f8ba32fdf26667fb Tue Sep 02 23:19:09 CEST 2014 Soren Brinkmann <soren.brinkmann@xilinx.com> ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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| H A D | common.c | diff 0beb2bd36f6216f455363f47f8ba32fdf26667fb Tue Sep 02 23:19:09 CEST 2014 Soren Brinkmann <soren.brinkmann@xilinx.com> ARM: zynq: PM: Enable DDR clock stop
The DDR controller can detect idle periods and leverage low power
features clock stop. When new requests occur, the DDRC resumes
normal operation.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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