Searched hist:"0 a2796da1182a7dcfba41f796f45986237bc1688" (Results 1 – 2 of 2) sorted by relevance
/linux/arch/m68k/include/asm/ |
H A D | fpu.h | diff 0a2796da1182a7dcfba41f796f45986237bc1688 Wed Oct 19 06:10:03 CEST 2011 Greg Ungerer <gerg@uclinux.org> m68k: add ColdFire FPU support for the V4e ColdFire CPUs
The V4e ColdFire CPU family also has an integrated FPU (as well as the MMU). So add code to support this hardware along side the existing m68k FPU code.
The ColdFire FPU is of course different to all previous 68k FP units. It is close in operation to the 68060, but not completely compatible. The biggest issue to deal with is that the ColdFire FPU multi-move instructions are different. It does not support multi-moving the FP control registers, and the multi-move of the FP data registers uses a different instruction mnemonic.
Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Matt Waddel <mwaddel@yahoo.com> Acked-by: Kurt Mahan <kmahan@xmission.com>
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/linux/arch/m68k/kernel/ |
H A D | setup_mm.c | diff 0a2796da1182a7dcfba41f796f45986237bc1688 Wed Oct 19 06:10:03 CEST 2011 Greg Ungerer <gerg@uclinux.org> m68k: add ColdFire FPU support for the V4e ColdFire CPUs
The V4e ColdFire CPU family also has an integrated FPU (as well as the MMU). So add code to support this hardware along side the existing m68k FPU code.
The ColdFire FPU is of course different to all previous 68k FP units. It is close in operation to the 68060, but not completely compatible. The biggest issue to deal with is that the ColdFire FPU multi-move instructions are different. It does not support multi-moving the FP control registers, and the multi-move of the FP data registers uses a different instruction mnemonic.
Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Matt Waddel <mwaddel@yahoo.com> Acked-by: Kurt Mahan <kmahan@xmission.com>
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