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Searched +full:xmem +full:- +full:address +full:- +full:hold +full:- +full:enable (Results 1 – 3 of 3) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dqcom,ebi2.txt3 The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
4 external memory (such as NAND or other memory-mapped peripherals) whereas
7 As it says it connects devices to an external bus interface, meaning address
8 lines (up to 9 address lines so can only address 1KiB external memory space),
9 data lines (16 bits), OE (output enable), ADV (address valid, used on some
10 NOR flash memories), WE (write enable). This on top of 6 different chip selects
18 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
23 Chip Select Physical address base
24 CS0 GPIO134 0x1a800000-0x1b000000 (8MB)
25 CS1 GPIO39 (A) / GPIO123 (B) 0x1b000000-0x1b800000 (8MB)
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H A Dqcom,ebi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The EBI2 contains two peripheral blocks: XMEM and LCDC. The XMEM handles any
11 external memory (such as NAND or other memory-mapped peripherals) whereas
14 As it says it connects devices to an external bus interface, meaning address
15 lines (up to 9 address lines so can only address 1KiB external memory space),
16 data lines (16 bits), OE (output enable), ADV (address valid, used on some
17 NOR flash memories), WE (write enable). This on top of 6 different chip selects
25 Also CS1 and CS2 has -A and -B signals. Why they have that is unclear to me.
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpi
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