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/linux/arch/arm64/boot/dts/airoha/
H A Den7581.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/en7523-clk.h>
6 #include <dt-bindings/reset/airoha,en7581-reset.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
13 reserved-memory {
14 #address-cells = <2>;
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/linux/drivers/net/ethernet/myricom/myri10ge/
H A Dmyri10ge_mcp.h1 /* SPDX-License-Identifier: GPL-2.0 */
109 #define MXGEFW_ETH_SEND_OFFSET(n) (MXGEFW_ETH_SEND(n) - MXGEFW_ETH_SEND_4)
160 * (plus mtu & mac address) must have been exchanged prior
192 * command return data = repetitions (MSH), 0.5-ms ticks (LSH)
205 * or is equal to FF-FF-FF-FF-FF-FF
234 * the NIC to be able to receive maximum-sized packets.
239 /* data0 = number of slices n (0, 1, ..., n-1) to enable
242 * 1=use one MSI-X per queue.
287 * always has enough header buffer to store maximum-sized headers.
305 * obtained data is cached inside the xaui-xfi chip :
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H A Dmyri10ge.c2 * myri10ge.c: Myricom Myri-10G Ethernet driver.
4 * Copyright (C) 2005 - 2011 Myricom, Inc.
34 * http://www.myri.com/scs/download-Myri10GE.html
49 #include <linux/dma-mapping.h>
78 #define MYRI10GE_VERSION_STR "1.5.3-1.534"
135 int mask; /* number of rx slots -1 */
146 int mask; /* number of transmit slots -1 */
243 u8 mac_addr[ETH_ALEN]; /* eeprom mac address */
274 {[0 ... (MYRI10GE_MAX_BOARDS - 1)] = NULL };
281 MODULE_PARM_DESC(myri10ge_ecrc_enable, "Enable Extended CRC on PCI-E");
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/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2003 - 2009 NetXen, Inc.
4 * Copyright (C) 2009 - QLogic Corporation.
47 * 7:0 - major
48 * 15:8 - minor
49 * 31:16 - build (little endian)
60 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
62 (sizeof(struct netxen_rx_buffer) * rds_ring->num_desc)
64 (sizeof(struct status_desc) * (sds_ring)->num_desc)
66 (sizeof(struct netxen_cmd_buffer) * tx_ring->num_desc)
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/linux/drivers/net/ethernet/airoha/
H A Dairoha_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
41 struct airoha_qdma *qdma = irq_bank->qdma; in airoha_qdma_set_irqmask()
42 int bank = irq_bank - &qdma->irq_banks[0]; in airoha_qdma_set_irqmask()
45 if (WARN_ON_ONCE(index >= ARRAY_SIZE(irq_bank->irqmask))) in airoha_qdma_set_irqmask()
48 spin_lock_irqsave(&irq_bank->irq_lock, flags); in airoha_qdma_set_irqmask()
50 irq_bank->irqmask[index] &= ~clear; in airoha_qdma_set_irqmask()
51 irq_bank->irqmask[index] |= set; in airoha_qdma_set_irqmask()
53 irq_bank->irqmask[index]); in airoha_qdma_set_irqmask()
59 spin_unlock_irqrestore(&irq_bank->irq_lock, flags); in airoha_qdma_set_irqmask()
76 struct airoha_eth *eth = port->qdma->eth; in airoha_set_macaddr()
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/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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