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/linux/drivers/media/usb/em28xx/
H A Dem28xx-camera.c323 * need to use a lower xclk frequency. in em28xx_init_camera()
324 * Yet, it would be possible to adjust xclk depending on the in em28xx_init_camera()
328 dev->board.xclk = EM28XX_XCLK_FREQUENCY_4_3MHZ; in em28xx_init_camera()
329 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera()
355 dev->board.xclk = EM28XX_XCLK_FREQUENCY_48MHZ; in em28xx_init_camera()
356 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera()
380 * - adjust bridge xclk in em28xx_init_camera()
398 dev->board.xclk = EM28XX_XCLK_FREQUENCY_24MHZ; in em28xx_init_camera()
399 em28xx_write_reg(dev, EM28XX_R0F_XCLK, dev->board.xclk); in em28xx_init_camera()
H A Dem28xx-input.c389 /* Adjust xclk based on IR table for RC5/NEC tables */ in em2860_ir_change_protocol()
391 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2860_ir_change_protocol()
395 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; in em2860_ir_change_protocol()
404 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, in em2860_ir_change_protocol()
418 /* Adjust xclk and set type based on IR table for RC5/NEC/RC6 tables */ in em2874_ir_change_protocol()
420 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol()
424 dev->board.xclk &= ~EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol()
429 dev->board.xclk |= EM28XX_XCLK_IR_RC5_MODE; in em2874_ir_change_protocol()
440 em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, dev->board.xclk, in em2874_ir_change_protocol()
H A Dem28xx-cards.c698 .xclk = EM28XX_XCLK_FREQUENCY_20MHZ,
734 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
743 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
1066 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
1160 .xclk = EM28XX_XCLK_I2S_MSB_TIMING |
1193 .xclk = EM28XX_XCLK_IR_RC5_MODE |
1219 .xclk = EM28XX_XCLK_IR_RC5_MODE |
1494 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ, /* NEC IR */
1750 .xclk = EM28XX_XCLK_FREQUENCY_10MHZ,
1858 .xclk = EM28XX_XCLK_FREQUENCY_12MHZ,
[all …]
/linux/Documentation/devicetree/bindings/media/i2c/
H A Dovti,ov5640.yaml23 description: XCLK Input Clock
26 const: xclk
100 clock-names = "xclk";
130 clock-names = "xclk";
H A Dovti,ov7251.yaml25 description: XCLK Input Clock
28 const: xclk
31 description: Frequency of the xclk clock in Hz.
H A Dovti,ov5645.yaml20 description: XCLK Input Clock
23 description: Frequency of the xclk clock in Hz.
H A Dsony,imx214.yaml31 description: Reference to the xclk clock.
35 description: Frequency of the xclk clock in Hz.
H A Dovti,ov5647.yaml26 description: Reference to the xclk clock.
/linux/drivers/clk/
H A Dclk-max9485.c78 struct clk *xclk; member
268 drvdata->xclk = devm_clk_get(dev, "xclk"); in max9485_i2c_probe()
269 if (IS_ERR(drvdata->xclk)) in max9485_i2c_probe()
270 return PTR_ERR(drvdata->xclk); in max9485_i2c_probe()
272 xclk_name = __clk_get_name(drvdata->xclk); in max9485_i2c_probe()
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j722s-evm-csi2-quad-tevi-ov5640.dtso97 clock-names = "xclk";
128 clock-names = "xclk";
164 clock-names = "xclk";
195 clock-names = "xclk";
H A Dk3-am625-beagleplay-csi2-tevi-ov5640.dtso13 clk_ov5640_fixed: ov5640-xclk {
67 clock-names = "xclk";
H A Dk3-am625-beagleplay-csi2-ov5640.dtso13 clk_ov5640_fixed: ov5640-xclk {
67 clock-names = "xclk";
H A Dk3-am62x-sk-csi2-tevi-ov5640.dtso13 clk_ov5640_fixed: ov5640-xclk {
69 clock-names = "xclk";
H A Dk3-am62x-sk-csi2-ov5640.dtso13 clk_ov5640_fixed: ov5640-xclk {
69 clock-names = "xclk";
/linux/drivers/media/i2c/
H A Dov5645.c92 struct clk *xclk; member
652 clk_disable_unprepare(ov5645->xclk); in ov5645_set_power_off()
667 ret = clk_prepare_enable(ov5645->xclk); in ov5645_set_power_on()
695 clk_disable_unprepare(ov5645->xclk); in ov5645_set_power_on()
1046 /* get system clock (xclk) */ in ov5645_probe()
1047 ov5645->xclk = devm_clk_get(dev, NULL); in ov5645_probe()
1048 if (IS_ERR(ov5645->xclk)) in ov5645_probe()
1049 return dev_err_probe(dev, PTR_ERR(ov5645->xclk), in ov5645_probe()
1050 "could not get xclk"); in ov5645_probe()
1055 "could not get xclk frequency\n"); in ov5645_probe()
[all …]
H A Dov5647.c103 struct clk *xclk; member
785 ret = clk_prepare_enable(sensor->xclk); in ov5647_power_on()
808 clk_disable_unprepare(sensor->xclk); in ov5647_power_on()
838 clk_disable_unprepare(sensor->xclk); in ov5647_power_off()
1401 sensor->xclk = devm_clk_get(dev, NULL); in ov5647_probe()
1402 if (IS_ERR(sensor->xclk)) { in ov5647_probe()
1403 dev_err(dev, "could not get xclk"); in ov5647_probe()
1404 return PTR_ERR(sensor->xclk); in ov5647_probe()
1407 xclk_freq = clk_get_rate(sensor->xclk); in ov5647_probe()
H A Dgc08a3.c88 struct clk *xclk; member
600 ret = clk_prepare_enable(gc08a3->xclk); in gc08a3_power_on()
621 clk_disable_unprepare(gc08a3->xclk); in gc08a3_power_off()
1202 gc08a3->xclk = devm_clk_get(dev, NULL); in gc08a3_probe()
1203 if (IS_ERR(gc08a3->xclk)) in gc08a3_probe()
1204 return dev_err_probe(dev, PTR_ERR(gc08a3->xclk), in gc08a3_probe()
1205 "failed to get xclk\n"); in gc08a3_probe()
1207 ret = clk_set_rate(gc08a3->xclk, GC08A3_DEFAULT_CLK_FREQ); in gc08a3_probe()
1210 "failed to set xclk frequency\n"); in gc08a3_probe()
H A Dov6650.c896 const struct ov6650_xclk *xclk = NULL; in ov6650_video_probe() local
913 xclk = &ov6650_xclk[i]; in ov6650_video_probe()
918 for (i = 0; !xclk && i < ARRAY_SIZE(ov6650_xclk); i++) { in ov6650_video_probe()
923 xclk = &ov6650_xclk[i]; in ov6650_video_probe()
925 xclk->rate / 1000); in ov6650_video_probe()
928 if (!xclk) { in ov6650_video_probe()
968 ret = ov6650_prog_dflt(client, xclk->clkrc); in ov6650_video_probe()
H A Dgc05a2.c88 struct clk *xclk; member
625 ret = clk_prepare_enable(gc05a2->xclk); in gc05a2_power_on()
646 clk_disable_unprepare(gc05a2->xclk); in gc05a2_power_off()
1238 gc05a2->xclk = devm_clk_get(dev, NULL); in gc05a2_probe()
1239 if (IS_ERR(gc05a2->xclk)) in gc05a2_probe()
1240 return dev_err_probe(dev, PTR_ERR(gc05a2->xclk), in gc05a2_probe()
1241 "failed to get xclk\n"); in gc05a2_probe()
1243 ret = clk_set_rate(gc05a2->xclk, GC05A2_DEFAULT_CLK_FREQ); in gc05a2_probe()
1246 "failed to set xclk frequency\n"); in gc05a2_probe()
/linux/Documentation/devicetree/bindings/clock/
H A Dmaxim,max9485.txt16 - clock-names: Must be set to "xclk"
44 clock-names = "xclk";
/linux/drivers/gpu/drm/radeon/
H A Dsumo_dpm.c121 u32 xclk = radeon_get_xclk(rdev); in sumo_program_git() local
124 xclk, 16, &p, &u); in sumo_program_git()
132 u32 xclk = radeon_get_xclk(rdev); in sumo_program_grsd() local
135 r600_calculate_u_and_p(1, xclk, 14, &p, &u); in sumo_program_grsd()
152 u32 xclk = radeon_get_xclk(rdev); in sumo_gfx_powergating_initialize() local
171 xclk, 16, &p, &u); in sumo_gfx_powergating_initialize()
177 xclk, 16, &p, &u); in sumo_gfx_powergating_initialize()
316 u32 xclk = radeon_get_xclk(rdev); in sumo_calculate_bsp() local
322 xclk, 16, &pi->bsp, &pi->bsu); in sumo_calculate_bsp()
325 xclk, 16, &pi->pbsp, &pi->pbsu); in sumo_calculate_bsp()
[all …]
H A Dsumo_smc.c145 u32 xclk = radeon_get_xclk(rdev); in sumo_enable_boost_timer() local
150 period = 100 * (xclk / 100 / sumo_power_of_4(unit)); in sumo_enable_boost_timer()
/linux/drivers/video/fbdev/aty/
H A Dmach64_ct.c68 * XCLK The clock rate of the on-chip memory
77 * - MCLK and XCLK use the same FB_DIV
94 * It can be quite hard to calculate XCLK and MCLK if they don't run at the
97 * So this driver uses SCLK to clock the chip and XCLK to clock the memory.
423 printk(KERN_CRIT "atyfb: Unsupported xclk source: %d.\n", pll->ct.xclk_post_div); in aty_init_pll_ct()
532 printk(KERN_CRIT "atxfb: xclk out of range\n"); in aty_init_pll_ct()
553 printk("atyfb(%s): pllmclk=%d MHz, xclk=%d MHz\n", in aty_init_pll_ct()
571 pll->ct.pll_gen_cntl |= (xpost_div << 4); /* mclk == xclk */ in aty_init_pll_ct()
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi21 clock-names = "xclk";
/linux/arch/arm64/boot/dts/qcom/
H A Dapq8016-sbc-d3-camera-mezzanine.dts66 clock-names = "xclk";

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