Searched +full:x1e80100 +full:- +full:cpucp +full:- +full:mbox (Results 1 – 2 of 2) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | qcom,cpucp-mbox.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mailbox/qcom,cpucp-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. CPUCP Mailbox Controller
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The CPUSS Control Processor (CPUCP) mailbox controller enables communication
14 between AP and CPUCP by acting as a doorbell between them.
19 - const: qcom,x1e80100-cpucp-mbox
23 - description: CPUCP rx register region
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | x1e80100.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
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