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/linux/include/dt-bindings/memory/
H A Dtegra234-mc.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
8 #define TEGRA234_SID_INVALID 0x00
9 #define TEGRA234_SID_PASSTHROUGH 0x7f
12 #define TEGRA234_SID_ISO_NVDISPLAY 0x01
13 #define TEGRA234_SID_ISO_VI 0x02
14 #define TEGRA234_SID_ISO_VIFALC 0x03
15 #define TEGRA234_SID_ISO_VI2 0x04
16 #define TEGRA234_SID_ISO_VI2FALC 0x05
17 #define TEGRA234_SID_ISO_VI_VM2 0x06
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H A Dtegra194-mc.h5 #define TEGRA194_SID_INVALID 0x00
6 #define TEGRA194_SID_PASSTHROUGH 0x7f
9 #define TEGRA194_SID_HOST1X 0x01
10 #define TEGRA194_SID_CSI 0x02
11 #define TEGRA194_SID_VIC 0x03
12 #define TEGRA194_SID_VI 0x04
13 #define TEGRA194_SID_ISP 0x05
14 #define TEGRA194_SID_NVDEC 0x06
15 #define TEGRA194_SID_NVENC 0x07
16 #define TEGRA194_SID_NVJPG 0x08
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H A Dnvidia,tegra264.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
13 #define TEGRA264_SID_AON TEGRA264_SID(0x01)
14 #define TEGRA264_SID_APE TEGRA264_SID(0x02)
15 #define TEGRA264_SID_ETR TEGRA264_SID(0x03)
16 #define TEGRA264_SID_BPMP TEGRA264_SID(0x04)
17 #define TEGRA264_SID_DCE TEGRA264_SID(0x05)
18 #define TEGRA264_SID_EQOS TEGRA264_SID(0x06)
19 #define TEGRA264_SID_GPCDMA TEGRA264_SID(0x08)
20 #define TEGRA264_SID_DISP TEGRA264_SID(0x09)
21 #define TEGRA264_SID_HDA TEGRA264_SID(0x0a)
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H A Dtegra186-mc.h5 #define TEGRA186_SID_INVALID 0x00
6 #define TEGRA186_SID_PASSTHROUGH 0x7f
9 #define TEGRA186_SID_HOST1X 0x01
10 #define TEGRA186_SID_CSI 0x02
11 #define TEGRA186_SID_VIC 0x03
12 #define TEGRA186_SID_VI 0x04
13 #define TEGRA186_SID_ISP 0x05
14 #define TEGRA186_SID_NVDEC 0x06
15 #define TEGRA186_SID_NVENC 0x07
16 #define TEGRA186_SID_NVJPG 0x08
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/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/
H A Dmetrics.json5 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
6 "ScaleUnit": "9.765625e-4KB",
11 "BriefDescription": "bytes of all masters write to ddr",
13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
14 "ScaleUnit": "9.765625e-4KB",
21 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
22 "ScaleUnit": "9.765625e-4KB",
27 "BriefDescription": "bytes of a53 core write to ddr",
29 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
30 "ScaleUnit": "9.765625e-4KB",
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/linux/tools/testing/selftests/net/
H A Dproc_net_pktgen.c1 // SPDX-License-Identifier: GPL-2.0
21 static const char thr_cmd_add_loopback_0[] = "add_device lo@0";
30 static const char dev_cmd_min_pkt_size_2[] = "min_pkt_size 0";
39 static const char dev_cmd_imix_weights_0[] = "imix_weights 0,7 576,4 1500,1";
44 static const char dev_cmd_imix_weights_5[] = "imix_weights 0";
45 static const char dev_cmd_imix_weights_6[] = "imix_weights 0,";
47 static const char dev_cmd_debug_1[] = "debug 0";
51 static const char dev_cmd_rate_0[] = "rate 0";
53 static const char dev_cmd_ratep_0[] = "ratep 0";
60 static const char dev_cmd_clone_skb_1[] = "clone_skb 0";
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/linux/kernel/
H A Dsysctl.c1 // SPDX-License-Identifier: GPL-2.0-only
27 const int sysctl_vals[] = { 0, 1, 2, 3, 4, 100, 200, 1000, 3000, INT_MAX, 65535, -1 };
30 const unsigned long sysctl_long_vals[] = { 0, 1, LONG_MAX };
42 * enum sysctl_writes_mode - supported sysctl write modes
44 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value
47 * is issued when the initial position is not 0.
49 * not 0.
51 * file position 0 and the value must be fully contained in the buffer
52 * sent to the write syscall. If dealing with strings respect the file
57 * These write modes control how current file position affects the behavior of
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/linux/tools/testing/selftests/kvm/x86/
H A Dhyperv_features.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Tests for Hyper-V features enablement
18 * but to activate the feature it is sufficient to set it to a non-zero
19 * value. Use BIT(0) for that.
22 KVM_X86_CPU_FEATURE(HYPERV_CPUID_ENLIGHTMENT_INFO, 0, EBX, 0)
27 bool write; member
44 uint8_t vector = 0; in guest_msr()
45 uint64_t msr_val = 0; in guest_msr()
47 GUEST_ASSERT(msr->idx); in guest_msr()
49 if (msr->write) in guest_msr()
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/linux/Documentation/wmi/devices/
H A Dmsi-wmi-platform.rst1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 MSI WMI Platform Features driver (msi-wmi-platform)
22 [WMI, Locale("MS\0x409"),
24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")]
26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
29 [WMI, Locale("MS\0x409"),
31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")]
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
36 [WMI, Dynamic, Provider("WmiProv"), Locale("MS\0x409"),
38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")]
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/linux/arch/parisc/kernel/
H A Dperf_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
18 #define MTDIAG_1(gr) .word 0x14201840 + gr*0x10000
19 #define MTDIAG_2(gr) .word 0x14401840 + gr*0x10000
20 #define MFDIAG_1(gr) .word 0x142008A0 + gr
21 #define MFDIAG_2(gr) .word 0x144008A0 + gr
22 #define STDIAG(dr) .word 0x14000AA0 + dr*0x200000
23 #define SFDIAG(dr) .word 0x14000BA0 + dr*0x200000
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/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A Duncore-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x04",
8 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu…
10 "UMask": "0xf",
14 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
15 "Counter": "0,1,2,3",
16 "EventCode": "0x04",
19 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p…
21 "UMask": "0x30",
26 "Counter": "0,1,2,3",
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/linux/drivers/gpu/drm/bridge/
H A Dtda998x_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <sound/hdmi-codec.h>
25 #include <media/cec-notifier.h>
27 #include <dt-bindings/display/tda998x.h>
101 * write a given register, we need to make sure CURPAGE register is set
106 #define REG2ADDR(reg) ((reg) & 0xff)
107 #define REG2PAGE(reg) (((reg) >> 8) & 0xff)
109 #define REG_CURPAGE 0xff /* write */
113 #define REG_VERSION_LSB REG(0x00, 0x00) /* read */
114 #define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
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/linux/Documentation/filesystems/
H A Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
12 device support (e.g. f2fs), zonefs does not hide the sequential write
14 write zones of the device must be written sequentially starting from the end
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
22 example of this approach is the implementation of LSM (log-structured merge)
31 -------------------
38 conventional zones. Any read or write access can be executed, similarly to a
41 sequentially. Each sequential zone has a write pointer maintained by the
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/linux/arch/mips/kernel/
H A Dcps-vec-ns16550.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include <asm/asm-offsets.h>
32 * _mips_cps_putc() - write a character to the UART
33 * @a0: ASCII character to write
45 * _mips_cps_puts() - write a string to the UART
46 * @a0: pointer to NULL-terminated ASCII string
49 * Write a null-terminated ASCII string to the UART.
51 NESTED(_mips_cps_puts, 0, ra)
55 1: lb a0, 0(s6)
65 * _mips_cps_putx4 - write a 4b hex value to the UART
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/linux/drivers/comedi/drivers/
H A Dni_660x.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Devices: [National Instruments] PCI-6601 (ni_660x), PCI-6602, PXI-6602,
10 * PCI-6608, PXI-6608, PCI-6624, PXI-6624
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
23 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
24 * DAQ 6601/6602 User Manual (NI 322137B-01)
35 /* See Register-Level Programmer Manual page 3.1 */
81 #define NI660X_DMA_CFG_SEL(_c, _s) (((_s) & 0x1f) << (8 * (_c)))
82 #define NI660X_DMA_CFG_SEL_MASK(_c) NI660X_DMA_CFG_SEL((_c), 0x1f)
83 #define NI660X_DMA_CFG_SEL_NONE(_c) NI660X_DMA_CFG_SEL((_c), 0x1f)
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/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_api.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #define ROWOFFSET_INGRESSPRECTLFRECORD 0
16 #define ROWOFFSET_INGRESSPRECLASSRECORD 0
19 #define ROWOFFSET_INGRESSPOSTCLASSRECORD 0
22 #define ROWOFFSET_INGRESSSCRECORD 0
28 #define ROWOFFSET_INGRESSSAKEYRECORD 0
31 #define ROWOFFSET_INGRESSPOSTCTLFRECORD 0
34 #define ROWOFFSET_EGRESSCTLFRECORD 0
37 #define ROWOFFSET_EGRESSCLASSRECORD 0
40 #define ROWOFFSET_EGRESSSCRECORD 0
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dcache.json102 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L…
103 "EventCode": "0xC1",
105 …-complex L2 cache, this event does not count. If the complex is configured without a per-complex L…
109 "EventCode": "0xC2",
114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co…
115 "EventCode": "0xC3",
117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor…
120 …PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
121 "EventCode": "0xC4",
123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry…
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/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A Duncore-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x01",
9 "UMask": "0xb",
14 "Counter": "0,1,2,3",
15 "EventCode": "0x01",
20 "UMask": "0x8",
25 "Counter": "0,1,2,3",
26 "EventCode": "0x04",
30 "UMask": "0x3f",
35 "Counter": "0,1,2,3",
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/linux/arch/s390/kernel/
H A Dmodule.c1 // SPDX-License-Identifier: GPL-2.0+
26 #include <asm/nospec-branch.h>
32 #if 0
43 execmem_free(mod->arch.trampolines_start); in module_arch_cleanup()
50 mod->state == MODULE_STATE_LIVE) in module_arch_freeing_init()
53 vfree(mod->arch.syminfo); in module_arch_freeing_init()
54 mod->arch.syminfo = NULL; in module_arch_freeing_init()
61 info = me->arch.syminfo + ELF_R_SYM (rela->r_info); in check_rela()
62 switch (ELF_R_TYPE (rela->r_info)) { in check_rela()
75 if (info->got_offset == -1UL) { in check_rela()
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/linux/arch/loongarch/mm/
H A Dfault.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 * Copyright (C) 1995 - 2000 by Ralf Baechle
13 #include <linux/entry-common.h>
34 static int __kprobes spurious_fault(unsigned long write, unsigned long address) in spurious_fault() argument
43 return 0; in spurious_fault()
47 return 0; in spurious_fault()
51 return 0; in spurious_fault()
55 return 0; in spurious_fault()
59 return 0; in spurious_fault()
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/linux/arch/sh/include/asm/
H A Dwatchdog.h1 /* SPDX-License-Identifier: GPL-2.0+
3 * include/asm-sh/watchdog.h
15 #define WTCNT_HIGH 0x5a
16 #define WTCSR_HIGH 0xa5
18 #define WTCSR_CKS2 0x04
19 #define WTCSR_CKS1 0x02
20 #define WTCSR_CKS0 0x01
25 * See cpu-sh2/watchdog.h for explanation of this stupidity..
36 * CKS0-2 supports a number of clock division ratios. At the time the watchdog
42 * --------------------------------------------
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/linux/block/
H A Dblk-zoned.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/blk-mq.h>
23 #include "blk-mq-sched.h"
24 #include "blk-mq-debugfs.h"
40 * Per-zone write plug.
42 * @ref: Zone write plug reference counter. A zone write plug reference is
48 * reference is dropped whenever the zone of the zone write plug is reset,
49 * finished and when the zone becomes full (last write BIO to the zone
54 * @wp_offset: The zone write pointer location relative to the start of the zone
58 * @rcu_head: RCU head to free zone write plugs with an RCU grace period.
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/linux/tools/testing/selftests/namespaces/
H A Dfile_handle_test.c1 // SPDX-License-Identifier: GPL-2.0
20 #define FD_NSFS_ROOT -10003 /* Root of the nsfs filesystem */
33 ASSERT_EQ(setresgid(65534, 65534, 65534), 0); /* nogroup */ in TEST()
34 ASSERT_EQ(setresuid(65534, 65534, 65534), 0); /* nobody */ in TEST()
41 ASSERT_GE(ns_fd, 0); in TEST()
44 handle->handle_bytes = MAX_HANDLE_SZ; in TEST()
46 if (ret < 0 && errno == EOPNOTSUPP) { in TEST()
50 ASSERT_EQ(ret, 0); in TEST()
51 ASSERT_GT(handle->handle_bytes, 0); in TEST()
55 if (fd < 0 && (errno == EINVAL || errno == EOPNOTSUPP)) { in TEST()
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/linux/tools/perf/pmu-events/arch/arm64/thead/yitian710/sys/
H A Dali_drw.json3 "BriefDescription": "A Write or Read Op at HIF interface. The unit is 64B.",
4 "ConfigCode": "0x0",
10 "BriefDescription": "A Write Op at HIF interface. The unit is 64B.",
11 "ConfigCode": "0x1",
18 "ConfigCode": "0x2",
24 "BriefDescription": "A Read-Modify-Write Op at HIF interface. The unit is 64B.",
25 "ConfigCode": "0x3",
32 "ConfigCode": "0x4",
38 "BriefDescription": "A write data cycle at DFI interface (to DRAM).",
39 "ConfigCode": "0x7",
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/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_const.c1 // SPDX-License-Identifier: GPL-2.0
14 __description("rodata/strtol: write rejected")
15 __failure __msg("write into map forbidden")
18 char buff[] = { '8', '4', '\0' }; in tcx1()
19 bpf_strtol(buff, sizeof(buff), 0, (long *)&foo); in tcx1()
24 __description("bss/strtol: write accepted")
28 char buff[] = { '8', '4', '\0' }; in tcx2()
29 bpf_strtol(buff, sizeof(buff), 0, &bar); in tcx2()
34 __description("data/strtol: write accepted")
38 char buff[] = { '8', '4', '\0' }; in tcx3()
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