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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Datmel,ebi.txt5 The EBI provides a glue-less interface to asynchronous memories through the SMC
10 - compatible: "atmel,at91sam9260-ebi"
11 "atmel,at91sam9261-ebi"
12 "atmel,at91sam9263-ebi0"
13 "atmel,at91sam9263-ebi1"
14 "atmel,at91sam9rl-ebi"
15 "atmel,at91sam9g45-ebi"
16 "atmel,at91sam9x5-ebi"
17 "atmel,sama5d3-ebi"
18 "microchip,sam9x60-ebi"
[all …]
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,fimd.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,s3c2443-fimd
19 - samsung,s3c6400-fimd
20 - samsung,s5pv210-fimd
[all …]
H A Dsamsung,exynos7-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
22 const: samsung,exynos7-decon
27 clock-names:
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3xcm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <12000000>;
34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
39 compatible = "atmel,tcb-timer";
44 compatible = "atmel,tcb-timer";
51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>;
52 pinctr-name = "default";
[all …]
/linux/sound/soc/intel/boards/
H A Dsof_cirrus_common.c1 // SPDX-License-Identifier: GPL-2.0-only
21 SOC_DAPM_PIN_SWITCH("WR Spk"),
28 SND_SOC_DAPM_SPK("WR Spk", NULL),
36 {"WR Spk", NULL, "WR SPK"},
50 struct snd_soc_card *card = rtd->card; in cs35l41_init()
53 ret = snd_soc_dapm_new_controls(&card->dapm, cs35l41_dapm_widgets, in cs35l41_init()
56 dev_err(rtd->dev, "fail to add dapm controls, ret %d\n", ret); in cs35l41_init()
63 dev_err(rtd->dev, "fail to add card controls, ret %d\n", ret); in cs35l41_init()
67 ret = snd_soc_dapm_add_routes(&card->dapm, cs35l41_dapm_routes, in cs35l41_init()
71 dev_err(rtd->dev, "fail to add dapm routes, ret %d\n", ret); in cs35l41_init()
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
42 /* switch inherited setup to OneNAND */
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
[all …]
/linux/sound/soc/uniphier/
H A Daio-core.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (c) 2016-2018 Socionext Inc.
17 #include "aio-reg.h"
19 static u64 rb_cnt(u64 wr, u64 rd, u64 len) in rb_cnt() argument
21 if (rd <= wr) in rb_cnt()
22 return wr - rd; in rb_cnt()
24 return len - (rd - wr); in rb_cnt()
27 static u64 rb_cnt_to_end(u64 wr, u64 rd, u64 len) in rb_cnt_to_end() argument
29 if (rd <= wr) in rb_cnt_to_end()
30 return wr - rd; in rb_cnt_to_end()
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/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-crs328-4c-20s-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS328-4C-20S-4S+ board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS328-4C-20S-4S+";
25 compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-crs305-1g-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS305-1G-4S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS305-1G-4S+";
25 compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-crs326-24g-2s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS326-24G-2S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS326-24G-2S+";
25 compatible = "mikrotik,crs326-24g-2s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
[all …]
H A Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
[all …]
H A Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
H A Darmada-xp-openblocks-ax3-4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for OpenBlocks AX3-4 board
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "armada-xp-mv78260.dtsi"
16 model = "PlatHome OpenBlocks AX3-4 board";
17 …compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell…
20 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-385-atl-x530.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 (x530/AT-GS980MX)
9 /dts-v1/;
10 #include "armada-385.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
15 model = "x530/AT-GS980MX";
19 stdout-path = "serial1:115200n8";
32 internal-regs {
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c0_pins>;
[all …]
H A Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include "armada-xp-mv78460.dtsi"
27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
[all …]
H A Darmada-xp-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-78460-BP)
6 * Copyright (C) 2012-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
23 /dts-v1/;
24 #include "armada-xp-mv78460.dtsi"
28 …compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370…
31 stdout-path = "serial0:115200n8";
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddib3000mb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Frontend driver for mobile DVB-T demodulator DiBcom 3000M-B
6 * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@posteo.de)
15 * sources, on which this driver (and the dvb-dibusb) are based.
17 * see Documentation/driver-api/media/drivers/dvb-usb.rst for more information
36 #define DRIVER_DESC "DiBcom 3000M-B DVB-T demodulator"
41 MODULE_PARM_DESC(debug, "set debugging level (1=info,2=xfer,4=setfe,8=getfe (|-able)).");
56 { .addr = state->config.demod_address, .flags = 0, .buf = wb, .len = 2 }, in dib3000_read_reg()
57 { .addr = state->config.demod_address, .flags = I2C_M_RD, .buf = rb, .len = 2 }, in dib3000_read_reg()
60 if (i2c_transfer(state->i2c, msg, 2) != 2) in dib3000_read_reg()
[all …]
/linux/arch/sparc/kernel/
H A Dirq_32.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
21 #include <asm/setup.h>
28 /* platform specific irq setup */
39 "wr %1, 0, %%psr\n\t" in arch_local_irq_save()
56 "wr %0, 0, %%psr\n\t" in arch_local_irq_enable()
72 "wr %0, %2, %%psr\n\t" in arch_local_irq_restore()
98 * 32-bit values in that case. Since this is similar to sparc64,
106 * We keep a map of per-PIL enable interrupts. These get wired
107 * up via the irq_chip->startup() method which gets invoked by
[all …]
H A Dhvtramp.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* hvtramp.S: Hypervisor start-cpu trampoline code.
31 * First setup basic privileged cpu state.
95 wr %g0, 0, %fprs
96 wr %g0, ASI_P, %asi
H A Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
7 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
21 #include <asm/asm-offsets.h>
38 #define _SV save %sp, -STACKFRAME_SZ, %sp
55 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
67 * %l3 -- base address of fdc registers
68 * %l4 -- pdma_vaddr
69 * %l5 -- scratch for ld/st address
70 * %l6 -- pdma_size
[all …]
/linux/include/linux/platform_data/
H A Dvideo-pxafb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Author: Jean-Frederic Clere
15 * bits 0 - 3: for LCD panel type:
17 * STN - for passive matrix
18 * DSTN - for dual scan passive matrix
19 * TFT - for active matrix
21 * bits 4 - 9 : for bus width
22 * bits 10-17 : for AC Bias Pin Frequency
61 * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
86 /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details
[all …]
/linux/arch/sh/boards/
H A Dboard-magicpanelr2.c1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/sh/boards/magicpanel/setup.c
7 * Magic Panel Release 2 board setup
65 /* CS2: LAN (0x08000000 - 0x0bffffff) */ in setup_chip_select()
68 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
71 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ in setup_chip_select()
74 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
77 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ in setup_chip_select()
80 /* (SW:1.5 WR:3 HW:1.5), ext. wait */ in setup_chip_select()
83 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ in setup_chip_select()
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_uld.h4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
55 CPL_PRIORITY_SETUP = 1, /* connection setup messages */
63 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
64 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
65 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
67 (w)->wr.wr_lo = cpu_to_be64(0); \
76 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
78 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
[all …]
/linux/net/9p/
H A Dtrans_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (C) 2004-2005 by Latchesar Ionkov <lucho@ionkov.net>
8 * Copyright (C) 2004-2008 by Eric Van Hensbergen <ericvh@gmail.com>
9 * Copyright (C) 1997-2002 by Ron Minnich <rminnich@sarnoff.com>
46 * struct p9_trans_rdma - RDMA transport instance
48 * @state: tracks the transport state machine for connection setup and tear down
97 * struct p9_rdma_context - Keeps track of in-process WR
100 * @busa: Bus address to unmap when the WR completes
114 * struct p9_rdma_opts - Collection of mount options
152 struct p9_trans_rdma *rdma = clnt->trans; in p9_rdma_show_options()
[all …]

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