/freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
H A D | fsl-imx-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml# 7 title: Freescale i.MX Watchdog Timer (WDT) Controller 15 - const: fsl,imx21-wdt 18 - fsl,imx25-wdt 19 - fsl,imx27-wdt 20 - fsl,imx31-wdt 21 - fsl,imx35-wdt 22 - fsl,imx50-wdt 23 - fsl,imx51-wdt 24 - fsl,imx53-wdt [all …]
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H A D | renesas,wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/renesas,wdt.yaml# 7 title: Renesas Watchdog Timer (WDT) Controller 18 - renesas,r7s72100-wdt # RZ/A1 19 - renesas,r7s9210-wdt # RZ/A2 20 - const: renesas,rza-wdt # RZ/A 24 - renesas,r9a06g032-wdt # RZ/N1D 25 - const: renesas,rzn1-wdt # RZ/N1 29 - renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five 30 - renesas,r9a07g044-wdt # RZ/G2{L,LC} 31 - renesas,r9a07g054-wdt # RZ/V2L [all …]
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H A D | mtk-wdt.txt | 9 "mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701 10 "mediatek,mt2712-wdt": for MT2712 11 "mediatek,mt6582-wdt", "mediatek,mt6589-wdt": for MT6582 12 "mediatek,mt6589-wdt": for MT6589 13 "mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797 14 "mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622 15 "mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623 16 "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629 17 "mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986 18 "mediatek,mt8183-wdt": for MT8183 [all …]
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H A D | qcom-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml# 20 - qcom,kpss-wdt-ipq4019 21 - qcom,apss-wdt-ipq5018 22 - qcom,apss-wdt-ipq5332 23 - qcom,apss-wdt-ipq9574 24 - qcom,apss-wdt-msm8226 25 - qcom,apss-wdt-msm8974 26 - qcom,apss-wdt-msm8994 27 - qcom,apss-wdt-qcm2290 28 - qcom,apss-wdt [all...] |
H A D | mediatek,mtk-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml# 23 - mediatek,mt2712-wdt 24 - mediatek,mt6589-wdt 25 - mediatek,mt6735-wdt 26 - mediatek,mt6795-wdt 27 - mediatek,mt7986-wdt 28 - mediatek,mt7988-wdt 29 - mediatek,mt8183-wdt 30 - mediatek,mt8186-wdt 31 - mediatek,mt8188-wdt [all...] |
H A D | allwinner,sun4i-a10-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/allwinner,sun4i-a10-wdt.yaml# 19 - const: allwinner,sun4i-a10-wdt 20 - const: allwinner,sun6i-a31-wdt 23 - allwinner,sun50i-a64-wdt 24 - allwinner,sun50i-a100-wdt 25 - allwinner,sun50i-h6-wdt 26 - allwinner,sun50i-h616-wdt 27 - allwinner,sun50i-r329-wdt 28 - allwinner,sun50i-r329-wdt-reset 29 - allwinner,suniv-f1c100s-wdt [all...] |
H A D | snps,dw-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml# 18 - const: snps,dw-wdt 21 - rockchip,px30-wdt 22 - rockchip,rk3066-wdt 23 - rockchip,rk3128-wdt 24 - rockchip,rk3188-wdt 25 - rockchip,rk3228-wdt 26 - rockchip,rk3288-wdt 27 - rockchip,rk3308-wdt 28 - rockchip,rk3328-wdt [all...] |
H A D | samsung-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/samsung-wdt.yaml# 14 after a preset amount of time during which the WDT reset event has not 21 - google,gs101-wdt # for Google gs101 22 - samsung,s3c2410-wdt # for S3C2410 23 - samsung,s3c6410-wdt # for S3C6410, S5PV210 and Exynos4 24 - samsung,exynos5250-wdt # for Exynos5250 25 - samsung,exynos5420-wdt # for Exynos5420 26 - samsung,exynos7-wdt # for Exynos7 27 - samsung,exynos850-wdt # for Exynos850 28 - samsung,exynosautov9-wdt # fo [all...] |
H A D | marvel.txt | 5 - Compatibility : "marvell,orion-wdt" 6 "marvell,armada-370-wdt" 7 "marvell,armada-xp-wdt" 8 "marvell,armada-375-wdt" 9 "marvell,armada-380-wdt" 15 For "marvell,armada-375-wdt" and "marvell,armada-380-wdt": 20 Clocks required for compatibles = "marvell,orion-wdt", 21 "marvell,armada-370-wdt": 24 Clocks required for compatibles = "marvell,armada-xp-wdt" 25 "marvell,armada-375-wdt" [all …]
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H A D | xlnx,xps-timebase-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml# 14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter. 15 WDT uses a dual-expiration architecture. After one expiration of 16 the timeout interval, an interrupt is generated and the WDT state 19 expiration of the timeout interval, a WDT reset is generated. 27 - xlnx,xps-timebase-wdt-1.01.a 28 - xlnx,xps-timebase-wdt-1.00.a 39 xlnx,wdt-interval: 45 xlnx,wdt-enable-once: 61 compatible = "xlnx,xps-timebase-wdt-1.00.a"; [all …]
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H A D | meson-wdt.txt | 6 "amlogic,meson6-wdt" on Meson6 SoCs 7 "amlogic,meson8-wdt" and "amlogic,meson6-wdt" on Meson8 SoCs 8 "amlogic,meson8b-wdt" on Meson8b SoCs 9 "amlogic,meson8m2-wdt" and "amlogic,meson8b-wdt" on Meson8m2 SoCs 17 wdt: watchdog@c1109900 { 18 compatible = "amlogic,meson6-wdt";
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H A D | lantiq-wdt.txt | 9 "lantiq,wdt" 10 "lantiq,xrx100-wdt" 11 "lantiq,xrx200-wdt", "lantiq,xrx100-wdt" 12 "lantiq,falcon-wdt" 15 "lantiq,falcon-wdt" and "lantiq,xrx100-wdt") 20 compatible = "lantiq,xrx200-wdt", "lantiq,xrx100-wdt";
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H A D | apple,wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/apple,wdt.yaml# 19 - apple,t8103-wdt 20 - apple,t8112-wdt 21 - apple,t6000-wdt 22 - const: apple,wdt 46 wdt: watchdog@50000000 { 47 compatible = "apple,t8103-wdt", "apple,wdt";
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H A D | omap-wdt.txt | 1 TI Watchdog Timer (WDT) Controller for OMAP 4 - compatible : "ti,omap3-wdt" for OMAP3 or "ti,omap4-wdt" for OMAP4 5 - ti,hwmods : Name of the hwmod associated to the WDT 12 wdt2: wdt@4a314000 { 13 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
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H A D | amlogic,meson6-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/amlogic,meson6-wdt.yaml# 20 - amlogic,meson6-wdt 21 - amlogic,meson8-wdt 22 - amlogic,meson8b-wdt 24 - const: amlogic,meson8m2-wdt 25 - const: amlogic,meson8b-wdt 45 wdt: watchdog@c1109900 { 46 compatible = "amlogic,meson6-wdt";
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H A D | of-xilinx-wdt.txt | 5 - compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or 6 "xlnx,xps-timebase-wdt-1.01.a". 13 - xlnx,wdt-enable-once : 0 - Watchdog can be restarted 15 - xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles, 19 axi-timebase-wdt@40100000 { 21 compatible = "xlnx,xps-timebase-wdt-1.00.a"; 24 xlnx,wdt-enable-once = <0x0>; 25 xlnx,wdt-interval = <0x1b>;
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H A D | imgpdc-wdt.txt | 1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT) 4 - compatible : Should be "img,pdc-wdt" 5 - reg : Should contain WDT registers location and length 7 - clock-names: Should contain "wdt" and "sys"; the watchdog counter 9 - interrupts : Should contain WDT interrupt 14 compatible = "img,pdc-wdt"; 17 clock-names = "wdt", "sys";
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H A D | realtek,otto-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml# 17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout. 20 During this phase, pinging the WDT has no effect, and a reset is 21 unavoidable, unless the WDT is disabled. 29 - realtek,rtl8380-wdt 30 - realtek,rtl8390-wdt 31 - realtek,rtl9300-wdt 32 - realtek,rtl9310-wdt 77 compatible = "realtek,rtl8380-wdt";
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H A D | davinci-wdt.txt | 1 Texas Instruments DaVinci/Keystone Watchdog Timer (WDT) Controller 4 - compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt" 5 - reg : Should contain WDT registers location and length 19 wdt: wdt@2320000 { 20 compatible = "ti,davinci-wdt";
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H A D | fsl-imx7ulp-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/fsl-imx7ulp-wdt.yaml# 7 title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller 18 - const: fsl,imx7ulp-wdt 20 - const: fsl,imx8ulp-wdt 21 - const: fsl,imx7ulp-wdt 22 - const: fsl,imx93-wdt 52 compatible = "fsl,imx7ulp-wdt";
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H A D | linux,wdt-gpio.yaml | 4 $id: http://devicetree.org/schemas/watchdog/linux,wdt-gpio.yaml# 15 const: linux,wdt-gpio 18 description: gpio connection to WDT reset pin 25 Either a high-to-low or a low-to-high transition clears the WDT counter. 30 Low or high level starts counting WDT timeout, the opposite level 31 disables the WDT. 64 compatible = "linux,wdt-gpio";
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H A D | qcom-wdt.txt | 7 "qcom,kpss-wdt-msm8960" 8 "qcom,kpss-wdt-apq8064" 9 "qcom,kpss-wdt-ipq8064" 10 "qcom,kpss-wdt-ipq4019" 13 "qcom,kpss-wdt" 24 compatible = "qcom,kpss-wdt-ipq8064";
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H A D | gpio-wdt.txt | 4 - compatible: Should contain "linux,wdt-gpio". 5 - gpios: From common gpio binding; gpio connection to WDT reset pin. 9 the WDT counter. The watchdog timer is disabled when GPIO is 11 - level: Low or high level starts counting WDT timeout, 12 the opposite level disables the WDT. Active level is determined 24 compatible = "linux,wdt-gpio";
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H A D | gpio-wdt.yaml | 4 $id: http://devicetree.org/schemas/watchdog/gpio-wdt.yaml# 14 const: linux,wdt-gpio 18 description: GPIO connected to the WDT reset pin 25 Either a high-to-low or a low-to-high transition clears the WDT counter. 30 Low or high level starts counting WDT timeout, the opposite level 31 disables the WDT.
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H A D | qca-ar7130-wdt.txt | 1 * Qualcomm Atheros AR7130 Watchdog Timer (WDT) Controller 4 - compatible: must be "qca,ar7130-wdt" 10 wdt@18060008 { 11 compatible = "qca,ar9330-wdt", "qca,ar7130-wdt";
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