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/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.h44 #define BITS_BADOPC (5) /* 5 BADOPC 0 R/W */
46 #define BITS_BADDEST (4) /*4 BADDEST 0 R/W */
48 #define BITS_UNSOLRESP (3) /* 3 UNSOLRESP 0 R/W */
56 #define SH4A_PCIEENBLR (0x000008) /* R/W - 0x0000 0001 32 */
59 #define SH4A_PCIEECR (0x00000C) /* R/W - 0x0000 0000 32 */
60 #define BITS_ENBL (0) /* 0 ENBL 0 R/W */
64 #define SH4A_PCIEPAR (0x000010) /* R/W - 0x0000 0000 32 */
77 #define SH4A_PCIEPCTLR (0x000018) /* R/W - 0x0000 0000 32 */
86 #define SH4A_PCIEPDR (0x000020) /* R/W - 0x0000 0000 32 */
91 #define SH4A_PCIEMSGALR (0x000030) /* R/W - 0x0000 0000 32 */
[all …]
/linux/drivers/input/joystick/
H A Dwalkera0701.c62 static inline void walkera0701_parse_frame(struct walkera_dev *w) in walkera0701_parse_frame() argument
70 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
71 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
73 if ((w->buf[10] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
75 if (((w->buf[10] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
78 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
79 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
81 if ((w->buf[23] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
83 if (((w->buf[23] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
85 val1 = ((w->buf[0] & 7) * 256 + w->buf[1] * 16 + w->buf[2]) >> 2; in walkera0701_parse_frame()
[all …]
/linux/include/asm-generic/bitops/
H A Dconst_hweight.h8 #define __const_hweight8(w) \ argument
10 ((!!((w) & (1ULL << 0))) + \
11 (!!((w) & (1ULL << 1))) + \
12 (!!((w) & (1ULL << 2))) + \
13 (!!((w) & (1ULL << 3))) + \
14 (!!((w) & (1ULL << 4))) + \
15 (!!((w) & (1ULL << 5))) + \
16 (!!((w) & (1ULL << 6))) + \
17 (!!((w) & (1ULL << 7)))))
19 #define __const_hweight16(w) (__const_hweight8(w) + __const_hweight8((w) >> 8 )) argument
[all …]
/linux/tools/include/asm-generic/bitops/
H A Dconst_hweight.h8 #define __const_hweight8(w) \ argument
10 ((!!((w) & (1ULL << 0))) + \
11 (!!((w) & (1ULL << 1))) + \
12 (!!((w) & (1ULL << 2))) + \
13 (!!((w) & (1ULL << 3))) + \
14 (!!((w) & (1ULL << 4))) + \
15 (!!((w) & (1ULL << 5))) + \
16 (!!((w) & (1ULL << 6))) + \
17 (!!((w) & (1ULL << 7)))))
19 #define __const_hweight16(w) (__const_hweight8(w) + __const_hweight8((w) >> 8 )) argument
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/linux/arch/s390/include/asm/
H A Darch_hweight.h9 static __always_inline unsigned long popcnt_z196(unsigned long w) in popcnt_z196() argument
13 asm volatile(".insn rrf,0xb9e10000,%[cnt],%[w],0,0" in popcnt_z196()
15 : [w] "d" (w) in popcnt_z196()
20 static __always_inline unsigned long popcnt_z15(unsigned long w) in popcnt_z15() argument
24 asm volatile(".insn rrf,0xb9e10000,%[cnt],%[w],8,0" in popcnt_z15()
26 : [w] "d" (w) in popcnt_z15()
31 static __always_inline unsigned long __arch_hweight64(__u64 w) in __arch_hweight64() argument
34 return popcnt_z15(w); in __arch_hweight64()
36 w = popcnt_z196(w); in __arch_hweight64()
37 w += w >> 32; in __arch_hweight64()
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/linux/include/linux/
H A Dww_mutex.h98 * ww_mutex_init - initialize the w/w mutex
100 * @ww_class: the w/w class the mutex should belong to
102 * Initialize the w/w mutex to unlocked state and associate it with the given
103 * class. Static define macro for w/w mutex is not provided and this function
104 * is the only way to properly initialize the w/w mutex.
119 * ww_acquire_init - initialize a w/w acquire context
120 * @ctx: w/w acquire context to initialize
121 * @ww_class: w/w class of the context
123 * Initializes an context to acquire multiple mutexes of the given w/w class.
125 * Context-based w/w mutex acquiring can be done in any order whatsoever within
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/linux/net/ipv4/
H A Dtcp_westwood.c63 struct westwood *w = inet_csk_ca(sk); in tcp_westwood_init() local
65 w->bk = 0; in tcp_westwood_init()
66 w->bw_ns_est = 0; in tcp_westwood_init()
67 w->bw_est = 0; in tcp_westwood_init()
68 w->accounted = 0; in tcp_westwood_init()
69 w->cumul_ack = 0; in tcp_westwood_init()
70 w->reset_rtt_min = 1; in tcp_westwood_init()
71 w->rtt_min = w->rtt = TCP_WESTWOOD_INIT_RTT; in tcp_westwood_init()
72 w->rtt_win_sx = tcp_jiffies32; in tcp_westwood_init()
73 w->snd_una = tcp_sk(sk)->snd_una; in tcp_westwood_init()
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/linux/arch/m68k/ifpsp060/src/
H A Ditest.S173 mov.w &0x0004,ICCR(%a6)
174 mov.w &0x0000,%cc
179 mov.w %cc,SCCR(%a6)
197 mov.w &0x0004,ICCR(%a6)
198 mov.w &0x0000,%cc
203 mov.w %cc,SCCR(%a6)
220 mov.w &0x0000,ICCR(%a6)
221 mov.w &0x0000,%cc
226 mov.w %cc,SCCR(%a6)
243 mov.w &0x0000,ICCR(%a6)
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/linux/tools/lib/
H A Dhweight.c12 unsigned int __sw_hweight32(unsigned int w) in __sw_hweight32() argument
15 w -= (w >> 1) & 0x55555555; in __sw_hweight32()
16 w = (w & 0x33333333) + ((w >> 2) & 0x33333333); in __sw_hweight32()
17 w = (w + (w >> 4)) & 0x0f0f0f0f; in __sw_hweight32()
18 return (w * 0x01010101) >> 24; in __sw_hweight32()
20 unsigned int res = w - ((w >> 1) & 0x55555555); in __sw_hweight32()
28 unsigned int __sw_hweight16(unsigned int w) in __sw_hweight16() argument
30 unsigned int res = w - ((w >> 1) & 0x5555); in __sw_hweight16()
36 unsigned int __sw_hweight8(unsigned int w) in __sw_hweight8() argument
38 unsigned int res = w - ((w >> 1) & 0x55); in __sw_hweight8()
[all …]
/linux/lib/
H A Dhweight.c8 * @w: the word to weigh
13 unsigned int __sw_hweight32(unsigned int w) in __sw_hweight32() argument
16 w -= (w >> 1) & 0x55555555; in __sw_hweight32()
17 w = (w & 0x33333333) + ((w >> 2) & 0x33333333); in __sw_hweight32()
18 w = (w + (w >> 4)) & 0x0f0f0f0f; in __sw_hweight32()
19 return (w * 0x01010101) >> 24; in __sw_hweight32()
21 unsigned int res = w - ((w >> 1) & 0x55555555); in __sw_hweight32()
30 unsigned int __sw_hweight16(unsigned int w) in __sw_hweight16() argument
32 unsigned int res = w - ((w >> 1) & 0x5555); in __sw_hweight16()
39 unsigned int __sw_hweight8(unsigned int w) in __sw_hweight8() argument
[all …]
/linux/arch/loongarch/include/asm/
H A Dasm.h11 * Copyright (C) 2002 Maciej W. Rozycki
55 #define REG_L ld.w
56 #define REG_S st.w
57 #define REG_ADD add.w
58 #define REG_SUB sub.w
70 #define INT_ADD add.w
71 #define INT_ADDI addi.w
72 #define INT_SUB sub.w
73 #define INT_L ld.w
74 #define INT_S st.w
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/linux/drivers/isdn/hardware/mISDN/
H A Dipac.h125 #define IPAC_MODEB 0x22 /* R/W */
131 #define IPAC_RAL1 0x28 /* R/W */
135 #define IPAC_CCR2 0x2C /* R/W */
140 #define IPAC_CCR1 0x2F /* R/W */
159 #define IPAC_CONF 0xC0 /* R/W */
163 #define IPAC_ACFG 0xC3 /* R/W */
164 #define IPAC_AOE 0xC4 /* R/W */
167 #define IPAC_PITA1 0xC6 /* R/W */
168 #define IPAC_PITA2 0xC7 /* R/W */
169 #define IPAC_POTA1 0xC8 /* R/W */
[all …]
H A Dw6692.h14 #define W_D_XFIFO 0x04 /* W */
15 #define W_D_CMDR 0x08 /* W */
16 #define W_D_MODE 0x0c /* R/W */
17 #define W_D_TIMR 0x10 /* R/W */
19 #define W_IMASK 0x18 /* R/W */
21 #define W_D_EXIM 0x20 /* R/W */
24 #define W_D_SAM 0x2c /* R/W */
25 #define W_D_SAP1 0x30 /* R/W */
26 #define W_D_SAP2 0x34 /* R/W */
27 #define W_D_TAM 0x38 /* R/W */
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/linux/lib/crypto/x86/
H A Dsha1-ssse3-and-avx.S61 /* we keep window of 64 w[i]+K pre-calculated values in a circular buffer */
249 * RR does two rounds of SHA-1 back to back with W[] pre-calc
250 * t1 = F(b, c, d); e += w(i)
251 * e += t1; b <<= 30; d += w(i+1);
311 .set W, W0 define
319 .set W_minus_32, W
330 .set W_minus_04, W
331 .set W, W_minus_32 define
352 movdqa W_TMP1, W
363 * - calculating last 32 w[i] values in 8 XMM registers
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H A Dsha512-avx2-asm.S165 # Extract w[t-7]
166 MY_VPALIGNR YTMP0, Y_3, Y_2, 8 # YTMP0 = W[-7]
167 # Calculate w[t-16] + w[t-7]
168 vpaddq Y_0, YTMP0, YTMP0 # YTMP0 = W[-7] + W[-16]
169 # Extract w[t-15]
170 MY_VPALIGNR YTMP1, Y_1, Y_0, 8 # YTMP1 = W[-15]
174 # Calculate w[t-15] ror 1
177 vpor YTMP2, YTMP3, YTMP3 # YTMP3 = W[-15] ror 1
178 # Calculate w[t-15] shr 7
179 vpsrlq $7, YTMP1, YTMP4 # YTMP4 = W[-15] >> 7
[all …]
H A Dsha512-ssse3-asm.S98 # W[t]+K[t] (stack frame)
125 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
129 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
131 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
154 # Two rounds are computed based on the values for K[t-2]+W[t-2] and
155 # K[t-1]+W[t-1] which were previously stored at WK_2 by the message
162 # Eg. XMM2=W[t-2] really means XMM2={W[t-2]|W[t-1]}
171 movdqa W_t(idx), %xmm2 # XMM2 = W[t-2]
174 movdqa %xmm2, %xmm0 # XMM0 = W[t-2]
179 movdqu W_t(idx), %xmm5 # XMM5 = W[t-15]
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/linux/arch/m68k/math-emu/
H A Dfp_util.S106 move.w #0x3fff+31,%d1
134 lsr.w #8,%d1
136 cmp.w #0xff,%d1 | NaN / Inf?
139 add.w #0x3fff-0x7f,%d1 | re-bias the exponent.
152 move.w #0x4000-0x7f,%d1
157 move.w #0x7fff,%d1
172 lsr.w #5,%d1
174 cmp.w #0x7ff,%d1 | NaN / Inf?
177 add.w #0x3fff-0x3ff,%d1 | re-bias the exponent.
197 move.w #0x4000-0x3ff,%d1
[all …]
/linux/drivers/net/wireless/mediatek/mt76/
H A Dutil.h57 mt76_worker_setup(struct ieee80211_hw *hw, struct mt76_worker *w,
65 w->fn = fn; in mt76_worker_setup()
66 w->task = kthread_run(__mt76_worker_fn, w, in mt76_worker_setup()
69 if (IS_ERR(w->task)) { in mt76_worker_setup()
70 ret = PTR_ERR(w->task); in mt76_worker_setup()
71 w->task = NULL; in mt76_worker_setup()
78 static inline void mt76_worker_schedule(struct mt76_worker *w)
80 if (!w->task) in mt76_worker_schedule()
83 if (!test_and_set_bit(MT76_WORKER_SCHEDULED, &w in mt76_worker_schedule()
58 mt76_worker_setup(struct ieee80211_hw * hw,struct mt76_worker * w,void (* fn)(struct mt76_worker *),const char * name) mt76_worker_setup() argument
79 mt76_worker_schedule(struct mt76_worker * w) mt76_worker_schedule() argument
89 mt76_worker_disable(struct mt76_worker * w) mt76_worker_disable() argument
98 mt76_worker_enable(struct mt76_worker * w) mt76_worker_enable() argument
107 mt76_worker_teardown(struct mt76_worker * w) mt76_worker_teardown() argument
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/linux/drivers/media/platform/samsung/s5p-g2d/
H A Dg2d-hw.c14 #define w(x, a) writel((x), d->regs + (a)) macro
20 w(1, SOFT_RESET_REG); in g2d_reset()
27 w(0, SRC_SELECT_REG); in g2d_set_src_size()
28 w(f->stride & 0xFFFF, SRC_STRIDE_REG); in g2d_set_src_size()
33 w(n, SRC_LEFT_TOP_REG); in g2d_set_src_size()
38 w(n, SRC_RIGHT_BOTTOM_REG); in g2d_set_src_size()
40 w(f->fmt->hw, SRC_COLOR_MODE_REG); in g2d_set_src_size()
45 w(a, SRC_BASE_ADDR_REG); in g2d_set_src_addr()
52 w(0, DST_SELECT_REG); in g2d_set_dst_size()
53 w(f->stride & 0xFFFF, DST_STRIDE_REG); in g2d_set_dst_size()
[all …]
/linux/drivers/scsi/
H A Dnsp32.h81 #define IRQ_CONTROL 0x00 /* BASE+00, W, W */
82 #define IRQ_STATUS 0x00 /* BASE+00, W, R */
112 #define TRANSFER_CONTROL 0x02 /* BASE+02, W, W */
113 #define TRANSFER_STATUS 0x02 /* BASE+02, W, R */
130 #define INDEX_REG 0x04 /* BASE+04, Byte(R/W), Word(R) */
132 #define TIMER_SET 0x06 /* BASE+06, W, R/W */
136 #define DATA_REG_LOW 0x08 /* BASE+08, LowW, R/W */
137 #define DATA_REG_HI 0x0a /* BASE+0a, Hi-W, R/W */
139 #define FIFO_REST_CNT 0x0c /* BASE+0c, W, R/W */
144 #define SREQ_SMPL_RATE 0x0f /* BASE+0f, B, R/W */
[all …]
/linux/drivers/watchdog/
H A Dbd96801_wdt.c68 struct wdtbd96801 *w = watchdog_get_drvdata(wdt); in bd96801_wdt_ping() local
70 return regmap_update_bits(w->regmap, BD96801_REG_WD_FEED, in bd96801_wdt_ping()
76 struct wdtbd96801 *w = watchdog_get_drvdata(wdt); in bd96801_wdt_start() local
78 return regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, in bd96801_wdt_start()
84 struct wdtbd96801 *w = watchdog_get_drvdata(wdt); in bd96801_wdt_stop() local
86 return regmap_update_bits(w->regmap, BD96801_REG_WD_CONF, in bd96801_wdt_stop()
166 static int bd96801_set_wdt_mode(struct wdtbd96801 *w, unsigned int hw_margin, in bd96801_set_wdt_mode() argument
170 struct device *dev = w->dev; in bd96801_set_wdt_mode()
211 w->wdt.min_hw_heartbeat_ms = min / 10; in bd96801_set_wdt_mode()
220 w->wdt.max_hw_heartbeat_ms = hw_margin / 10; in bd96801_set_wdt_mode()
[all …]
/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S33 /* We use registers 16 - 31 for the W values */
34 #define W(t) (((t)%16)+16) macro
37 LWZ(W(t),(t)*4,r4)
46 add r14,r0,W(t); \
47 LWZ(W((t)+4),((t)+4)*4,r4); \
58 xor r5,W((t)+4-3),W((t)+4-8); \
60 xor W((t)+4),W((t)+4-16),W((t)+4-14); \
61 add r0,r0,W(t); \
62 xor W((t)+4),W((t)+4),r5; \
64 rotlwi W((t)+4),W((t)+4),1
[all …]
/linux/drivers/media/platform/ti/omap/
H A Domap_voutlib.c69 try_win = new_win->w; in omap_vout_try_window()
97 new_win->w = try_win; in omap_vout_try_window()
126 win->w = new_win->w; in omap_vout_new_window()
133 if ((crop->height/win->w.height) >= 2) in omap_vout_new_window()
134 crop->height = win->w.height * 2; in omap_vout_new_window()
136 if ((crop->width/win->w.width) >= 2) in omap_vout_new_window()
137 crop->width = win->w.width * 2; in omap_vout_new_window()
144 if (crop->height != win->w.height) in omap_vout_new_window()
149 if ((crop->height/win->w.height) >= 4) in omap_vout_new_window()
150 crop->height = win->w.height * 4; in omap_vout_new_window()
[all …]
/linux/arch/riscv/include/asm/
H A Darch_hweight.h20 static __always_inline unsigned int __arch_hweight32(unsigned int w) in __arch_hweight32() argument
25 return __sw_hweight32(w); in __arch_hweight32()
31 : "=r" (w) : "r" (w) :); in __arch_hweight32()
33 return w; in __arch_hweight32()
36 static inline unsigned int __arch_hweight16(unsigned int w) in __arch_hweight16() argument
38 return __arch_hweight32(w & 0xffff); in __arch_hweight16()
41 static inline unsigned int __arch_hweight8(unsigned int w) in __arch_hweight8() argument
43 return __arch_hweight32(w & 0xff); in __arch_hweight8()
47 static __always_inline unsigned long __arch_hweight64(__u64 w) in __arch_hweight64() argument
52 return __sw_hweight64(w); in __arch_hweight64()
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/linux/drivers/atm/
H A Didt77105.h27 #define IDT77105_MCR_UPLO 0x80 /* R/W, User Prog'le Output Latch */
28 #define IDT77105_MCR_DREC 0x40 /* R/W, Discard Receive Error Cells */
29 #define IDT77105_MCR_ECEIO 0x20 /* R/W, Enable Cell Error Interrupts
31 #define IDT77105_MCR_TDPC 0x10 /* R/W, Transmit Data Parity Check */
32 #define IDT77105_MCR_DRIC 0x08 /* R/W, Discard Received Idle Cells */
33 #define IDT77105_MCR_HALTTX 0x04 /* R/W, Halt Tx */
34 #define IDT77105_MCR_UMODE 0x02 /* R/W, Utopia (cell/byte) Mode */
35 #define IDT77105_MCR_EIP 0x01 /* R/W, Enable Interrupt Pin */
47 #define IDT77105_DIAG_FTD 0x80 /* R/W, Force TxClav deassert */
48 #define IDT77105_DIAG_ROS 0x40 /* R/W, RxClav operation select */
[all …]

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