Searched +full:vsync +full:- +full:polarity +full:- +full:high (Results 1 – 9 of 9) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/regulator/ |
H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 16 There're still four pins for camera control, two inputs (strobe and vsync), [all...] |
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
H A D | tvp7002.txt | 7 - compatible : Must be "ti,tvp7002" 10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when 13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when 16 - pclk-sample: Clock polarity of the bus. Default value when this property is 19 - sync-on-green-active: Active state of Sync-on-green signal property of the 24 - field-even-active: Active-high Field ID output polarity control of the bus. 28 1 = FID output polarity inverted 31 video-interfaces.txt. 44 hsync-active = <1>; 45 vsync-active = <1>; [all …]
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H A D | tvp514x.txt | 3 The TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip 5 video formats into digital video component. The tvp514x decoder supports analog- 6 to-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D 7 conversion and decoding of NTSC, PAL and SECAM composite and S-video into 11 - compatible : value should be either one among the following 17 - hsync-active: HSYNC Polarity configuration for endpoint. 19 - vsync-active: VSYNC Polarity configuration for endpoint. 21 - pclk-sample: Clock polarity of the endpoint. 24 media/video-interfaces.txt. 37 hsync-active = <1>; [all …]
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H A D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver 6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] 7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] 8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] 9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] 10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] 11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) 12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) 13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) 16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0] [all …]
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H A D | st,st-mipid02.txt | 1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge 3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a 4 time. Active port input stream will be de-serialized and its content outputted 6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second 8 polarity swap. First port also supports data lane swap. 11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit. 14 - compatible: shall be "st,st-mipid02" 15 - clocks: reference to the xclk input clock. 16 - clock-names: shall be "xclk". 17 - VDDE-supply: sensor digital IO supply. Must be 1.8 volts. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
H A D | exynos_dp.txt | 5 -dp-controller node 6 -dptx-phy node(defined inside dp-controller node) 8 For the DP-PHY initialization, we use the dptx-phy node. 9 Required properties for dptx-phy: deprecated, use phys and phy-names 10 -reg: deprecated 12 -samsung,enable-mask: deprecated 13 The bit-mask used to enable/disable DP PHY. 15 For the Panel initialization, we read data from dp-controller node. 16 Required properties for dp-controller: 17 -compatible: [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/video-interface [all...] |
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3-gta04.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on omap3-beagle-xm.dts 7 /dts-v1/; 10 #include <dt-bindings/input/input.h> 17 cpu0-supply = <&vcc>; 27 stdout-pat [all...] |
/freebsd/sys/contrib/v4l/ |
H A D | videodev2.h | 4 * Copyright (C) 1999-2007 the contributors 46 * All kernel-specific stuff were moved to media/v4l2-dev.h, so 108 /* Four-character-code (FOURCC) */ 125 buffer, top-bottom order */ 126 V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */ 196 /* ITU-R 601 -- broadcast NTSC/PAL */ 199 /* 1125-Line (US) HDTV */ 205 /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */ 213 * unspecified chromaticities and full 0-255 on each of the 293 #define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R', 'G', 'B', '1') /* 8 RGB-3-3-2 */ [all …]
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